公开(公告)号：JP2005033177A

公开(公告)日：2005-02-03

申请号：JP2004134986

申请日：2004-04-30

Applicant: Kla-Tencor Technologies Corp ,  ケーエルエー−テンカー・テクノロジーズ・コーポレーションKLA−Tencor Technologies Corporation

Inventor： ROSENGAUS ELIEZER

IPC: G01N21/956 ,  G01N21/88 ,  G01N21/95 ,  H01L21/027 ,  H01L21/66

CPC classification number: G01N21/9503

Abstract: PROBLEM TO BE SOLVED: To provide a method and a device, which can be applied for inspecting the removal of an edge bead and are used for emphasizing an image contrast between a region covered with a resist and an uncovered silicon region on a wafer.
SOLUTION: The wafer is irradiated separately with an (s) polarization component and a (p) polarization component at an illuminating angle close to the Brewster angle of silicon or a resist, and an image difference between the reflected light of the (s) polarization component and the reflected light of the (p) polarization component is obtained.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种方法和装置，其可以用于检查边缘珠的去除，并且用于强调在抗蚀剂覆盖的区域和未覆盖的硅区域之间的图像对比度 晶圆。 解决方案：在接近硅或抗蚀剂的布鲁斯特角的照明角度下，分别用（s）偏振分量和（p）偏振分量照射晶片，并且（ s）偏振分量和（p）偏振分量的反射光。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2006208380A

公开(公告)日：2006-08-10

申请号：JP2006013889

申请日：2006-01-23

Applicant: Kla-Tencor Technologies Corp ,  ケーエルエー−テンカー・テクノロジーズ・コーポレーションKLA−Tencor Technologies Corporation

Inventor： ROSENGAUS ELIEZER

IPC: G01M11/02 ,  G01J3/14 ,  G01J3/18 ,  G01J3/26 ,  G01J3/45 ,  H01L21/027

CPC classification number: G01J3/453 ,  G01J3/02 ,  G01J3/0224 ,  G01J3/2823 ,  G01N21/211 ,  G01N21/9501 ,  G01N2021/213

Abstract: PROBLEM TO BE SOLVED: To provide a method and an apparatus for improving detection of defocusing on a wafer.
SOLUTION: The sensitivity with respect to local defocus defects is increased by using hyper-spectral imaging. The sensitivity with respect to a wide defocus defects is increased, by using a Fourier spatial analysis. The overall sensitivity with respect to the local and wide-area defocus defects is improved by combining them.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种用于改善晶片上散焦检测的方法和装置。 解决方案：通过使用超光谱成像，增加了局部散焦缺陷的灵敏度。 通过使用傅立叶空间分析来增加相对于宽散焦缺陷的灵敏度。 通过组合来改善局部和广域散焦缺陷的整体灵敏度。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005521899A

公开(公告)日：2005-07-21

申请号：JP2003580935

申请日：2003-03-28

Applicant: ケーエルエー−テンカー・テクノロジーズ・コーポレーションKLA−Tencor Technologies Corporation

Inventor： ウィルク・ディーター・イー． ,  サリバン・ジェイミー・エム． ,  ジョンソン・ラルフ・ティ． ,  タン・アンルン ,  ベラ・エリック・エヌ． ,  ラニヨン・レックス

IPC: G01B11/30 ,  G01N21/956 ,  G02B27/46 ,  G02F1/13

CPC classification number: G02B27/46 ,  G01N21/9501 ,  G01N21/95623 ,  G01N2021/8822 ,  G01N2021/95676

Abstract: 【課題】 光学システム内で検査されている試料から放射される光の空間的な一部を選択的にフィルタリングするメカニズムを提供する。
【解決手段】 ある実施形態において、プログラム可能な空間フィルタ（ＰＳＦ）は、ＵＶ波長範囲の部分における光と適合性がある材料から構築される。 具体的な応用例において、ＰＳＦは、ポリマー安定化液晶材料のようなＵＶ適合性材料から構築される。 さらなる局面において、ＰＳＦはまた、ＵＶグレードガラスから形成される一対の板を含む。 ＰＳＦはまた、平方当たり約１００および約３００Ωの間のシート抵抗を生じる比較的薄い第１および第２ＩＴＯレイヤを含みえる。 具体的な応用例において、ＰＳＦは、２つの方向における選択的フィルタリングを提供する。 言い換えればＰＳＦは、２方向のフィルタリングを提供する。

公开(公告)号：WO2009015154A1

公开(公告)日：2009-01-29

申请号：PCT/US2008/070783

申请日：2008-07-22

Applicant: KLA-TENCOR TECHNOLOGIES CORPORATION ,  ROUGH, Kirkwood ,  LIU, Xuefeng ,  LORDI, Vincenzo ,  LEVI, Shem-tov

Inventor： ROUGH, Kirkwood ,  LIU, Xuefeng ,  LORDI, Vincenzo ,  LEVI, Shem-tov

IPC: G21K5/10

CPC classification number: H01J37/063 ,  B82Y10/00 ,  B82Y40/00 ,  H01J37/045 ,  H01J37/073 ,  H01J37/075 ,  H01J37/3174 ,  H01J2237/0432

Abstract: Method and apparatus for achieving an intensity modulated electron blanker are disclosed. An apparatus includes a cathode exposed to an activation source to generate an electron beam. Cathode control circuitry adjusts a cathode control amplifier to regulate cathode voltage and the potential of the electron beam. In some approaches the electron beam potential is used to control the blanking frequency, switching speeds, and duty cycle. In another approach electron generating beams directed on to the cathode are modulated to control the electron beam.

Abstract translation: 公开了用于实现强度调制的电子消除器的方法和装置。 一种装置包括暴露于激活源的阴极以产生电子束。 阴极控制电路调节阴极控制放大器以调节阴极电压和电子束的电位。 在一些方法中，电子束电位用于控制消隐频率，开关速度和占空比。 在另一种方法中，调节指向阴极的电子产生光束以控制电子束。

公开(公告)号：WO2008156812A3

公开(公告)日：2008-12-24

申请号：PCT/US2008/007652

申请日：2008-06-18

Applicant: KLA-TENCOR TECHNOLOGIES CORPORATION ,  ARMSTRONG, J., Joseph

Inventor： ARMSTRONG, J., Joseph

IPC: G02B17/08 ,  G02B13/18

Abstract: A catadioptric objective configured to inspect a specimen is provided. The catadioptric objective includes a Mangin element having one surface at a first axial location and an extension element positioned together with the Mangin element. The extension element provides a second surface at a second axial location. Certain light energy reflected from the specimen passes to the second surface of the extension element, the Mangin element, and through a plurality of lenses. An aspheric surface may be provided, and light energy may be provided to the specimen using diverting elements such as prisms or reflective surfaces.

公开(公告)号：WO2007106864A3

公开(公告)日：2007-09-20

申请号：PCT/US2007/063995

申请日：2007-03-14

Applicant: KLA-TENCOR TECHNOLOGIES CORPORATION ,  SMITH, Mark ,  HARDISTER, Robert ,  POCHKOWSKI, Mike ,  WIDMANN, Amir ,  KASSEL, Elyakim ,  ADEL, Mike

Inventor： SMITH, Mark ,  HARDISTER, Robert ,  POCHKOWSKI, Mike ,  WIDMANN, Amir ,  KASSEL, Elyakim ,  ADEL, Mike

IPC: G06F17/50

Abstract: Computer-implemented methods, carrier media, and systems for creating a metrology target structure design for a reticle layout are provided. One computer-implemented method for creating a metrology target structure design for a reticle layout includes simulating how one or more initial metrology target structures will be formed on a wafer based on one or more fabrication processes that will be used to form a metrology target structure on the wafer and one or more initial metrology target structure designs. The method also includes creating the metrology target structure design based on results of the simulating step.

公开(公告)号：WO2007053376A3

公开(公告)日：2007-05-10

申请号：PCT/US2006/041514

申请日：2006-10-23

Applicant: KLA-TENCOR TECHNOLOGIES CORPORATION ,  LEVINSKI, Vladimir ,  ADEL, Michael, E. ,  FROMMER, Aviv ,  KANDEL, Daniel

Inventor： LEVINSKI, Vladimir ,  ADEL, Michael, E. ,  FROMMER, Aviv ,  KANDEL, Daniel

IPC: G06F17/50

Abstract: Methods and apparatus for fabricating a semiconductor die including several target structures. A first layer is formed that includes one or more line or trench structures that extend in a first direction (310). A second layer is formed that includes one or more line or trench structures that extend in a second direction that is perpendicular to the first structure, such that a projection of the target structure along the first direction is independent of the second direction and a projection of the target structure along the second direction is independent of the first direction (320). A target structure and a method for generating a calibration curve are also described.

公开(公告)号：WO2007044320A3

公开(公告)日：2007-04-19

申请号：PCT/US2006/038568

申请日：2006-09-29

Applicant: KLA-TENCOR TECHNOLOGIES CORPORATION ,  SHORTT, David ,  BIELLAK, Stephen ,  BELYAEV, Alexander

Inventor： SHORTT, David ,  BIELLAK, Stephen ,  BELYAEV, Alexander

IPC: G01N21/00

Abstract: Methods and systems for inspection of a wafer are provided. One method includes illuminating the wafer with light at a first wavelength that penetrates into the wafer and light at a second wafer that does not substantially penetrate into the wafer. The method also includes generating output signals responsive to light from the wafer resulting from the illuminating step. In addition, the method includes detecting defects on the wafer using the output signals. The method further includes determining if the defects are subsurface defects or surface defects using the output signals.

公开(公告)号：WO2007022538A2

公开(公告)日：2007-02-22

申请号：PCT/US2006/032822

申请日：2006-08-21

Applicant: KLA-TENCOR TECHNOLOGIES CORPORATION ,  SHI, Jianou ,  ZHANG, Xiafang ,  PEI, Shiyou ,  HUANG, Shu, Chun ,  YEH, Dennis ,  RZEPIELA, Jeffrey, A. ,  FENG, Yiping ,  KHAN, Ahmad ,  KAGAN, Alexander ,  EDELSTEIN, Sergio

Inventor： SHI, Jianou ,  ZHANG, Xiafang ,  PEI, Shiyou ,  HUANG, Shu, Chun ,  YEH, Dennis ,  RZEPIELA, Jeffrey, A. ,  FENG, Yiping ,  KHAN, Ahmad ,  KAGAN, Alexander ,  EDELSTEIN, Sergio

IPC: G01R31/26

CPC classification number: G01R31/2831 ,  G01R31/2856 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Test pads, methods, and systems for measuring properties of a wafer are provided. One test pad formed on a wafer includes a test structure configured such that one or more electrical properties of the test structure can be measured. The test pad also includes a conductive layer formed between the test structure and the wafer. The conductive layer prevents structures located under the test structure between the conductive layer and the wafer from affecting the one or more electrical properties of the test structure during measurement. One method for assessing plasma damage of a wafer includes measuring one or more electrical properties of a test structure formed on the wafer and determining an index characterizing the plasma damage of the test structure using the one or more electrical properties. In addition, systems and methods for controlling deposition of a charge on a wafer for measurement of one or more electrical properties of the wafer are provided. One system includes a corona source configured to deposit the charge on the wafer and a sensor configured to measure one or more conditions within the corona source. This system also includes a control subsystem configured to alter one or more parameters of the corona source based on the one or more conditions. Another system includes a corona source configured to deposit the charge on the wafer and a mixture of gases disposed within a discharge chamber of the corona source during the deposition of the charge. The mixture of gases alters one or more parameters of the charge deposited on the wafer.

Abstract translation: 提供了用于测量晶片性能的测试垫，方法和系统。 形成在晶片上的一个测试焊盘包括测试结构，其被配置为使得可以测量测试结构的一个或多个电特性。 测试垫还包括在测试结构和晶片之间形成的导电层。 导电层防止在测量期间位于导电层和晶片之间的测试结构下方的结构影响测试结构的一个或多个电性能。 用于评估晶片的等离子体损伤的一种方法包括测量形成在晶片上的测试结构的一个或多个电特性，并使用一个或多个电性质确定表征测试结构的等离子体损伤的指标。 此外，提供了用于控制晶片上的电荷沉积以测量晶片的一个或多个电性能的系统和方法。 一个系统包括配置成将电荷沉积在晶片上的电晕源和配置成测量电晕源内的一个或多个条件的传感器。 该系统还包括配置为基于一个或多个条件来改变电晕源的一个或多个参数的控制子系统。 另一种系统包括电晕源，其被配置为在电荷沉积期间将电荷沉积在晶片上以及布置在电晕源的放电室内的气体混合物。 气体混合物改变沉积在晶片上的电荷的一个或多个参数。

公开(公告)号：WO2007011630A2

公开(公告)日：2007-01-25

申请号：PCT/US2006/027129

申请日：2006-07-12

Applicant: KLA-TENCOR TECHNOLOGIES CORPORATION ,  WOLTERS, Christian, H. ,  ROMANOVSKY, Anatoly ,  SLOBODOV, Alexander

Inventor： WOLTERS, Christian, H. ,  ROMANOVSKY, Anatoly ,  SLOBODOV, Alexander

IPC: G01N21/88

CPC classification number: G01N21/9501 ,  G01J1/18 ,  G01N21/8851 ,  H01J43/30

Abstract: Inspection systems, circuits and methods are provided to enhance defect detection by addressing anode saturation as a limiting factor of the measurement detection range of a photomultiplier tube (PMT) detector. Inspection systems, circuits and methods are also provided to enhance defect detection by addressing saturation levels of the amplifier and analog-digital circuitry as a limiting factor of the measurement detection range of an inspection system. In addition, inspection systems, circuits, and methods are provided to enhance defect detection by reducing thermal damage to large particles by dynamically altering the incident laser beam power level supplied to the specimen during a surface inspection scan.

Abstract translation: 提供检查系统，电路和方法以通过解决阳极饱和作为光电倍增管（PMT）检测器的测量检测范围的限制因素来增强缺陷检测。 还提供了检测系统，电路和方法，通过解决放大器和模拟 - 数字电路的饱和水平作为检测系统测量检测范围的限制因素来增强缺陷检测。 此外，通过在表面检查扫描期间动态地改变提供给样本的入射激光束功率水平，提供了检查系统，电路和方法以通过减少对大颗粒的热损伤来增强缺陷检测。