Abstract:
Fabrication methods and structures relating to multi-level metallization of solar cells are described. In one embodiment, a back contact solar cell comprises a substrate having a substrate having a light receiving frontside surface and a backside surface for forming patterned emitter and non-nested base regions. Interdigitated doped emitter and base regions are formed on a backside surface of a crystalline semiconductor substrate. A patterned electrically insulating layer stack comprising a combination of at least a doped layer and an undoped capping layer is formed on the patterned doped emitter and base regions. A contact metallization pattern is formed comprising emitter metallization electrodes contacting the emitter regions and non-nested base metallization electrodes contacting the base regions wherein the non-nested base metallization electrodes are allowed to go beyond the base regions to overlap at least a portion of said patterned insulator without causing electrical shunts in the solar cell.
Abstract:
Fabrication methods and structures relating to multi-level metallization of solar cells are described. In one embodiment, a back contact solar cell comprises a substrate having a substrate having a light receiving frontside surface and a backside surface for forming patterned emitter and non-nested base regions. Interdigitated doped emitter and base regions are formed on a backside surface of a crystalline semiconductor substrate. A patterned electrically insulating layer stack comprising a combination of at least a doped layer and an undoped capping layer is formed on the patterned doped emitter and base regions. A contact metallization pattern is formed comprising emitter metallization electrodes contacting the emitter regions and non-nested base metallization electrodes contacting the base regions wherein the non-nested base metallization electrodes are allowed to go beyond the base regions to overlap at least a portion of said patterned insulator without causing electrical shunts in the solar cell.
Abstract:
Methods and an apparatus are disclosed, wherein a print head die includes a slot and ribs across the slot. The ribs are recessed from one or both sides of the die.
Abstract:
A slot (18) is formed that reaches through a first side (21) of a silicon substrate (12) to a second side of the silicon substrate (12). A trench (15) is laser patterned. The trench (15) has a mouth at the first side (21) of the silicon substrate (12). The trench (15) does not reach the second side of the silicon substrate (12). the trench (15) is dry etched until a depth of at least a portion of the trench (15) is extended approximately to the second side of the silicon substrate (12). A wet etch is performed to complete formation of the slot (18). the wet etch etches silicon from all surfaces of the trench (15).
Abstract:
Annealing solutions providing damage-free laser patterning utilizing auxiliary heating to anneal laser damaged ablation regions are provided herein. Ablation spots on an underlying semiconductor substrate are annealed during or after pulsed laser ablation patterning of overlying transparent passivation layers.
Abstract:
A print head die (30) includes slot ribs (41) having edges (62, 64) with triangular notches. In one embodiment, the print head die is formed by dry etching from a first side (50) of a wafer (30) a series of spaced openings (220) completely through the wafer (30) and separated by ribs (41) followed by wet etching the wafer (30) from a second opposite side (44) to recess the ribs (41) from the second side (44).
Abstract:
Methods and an apparatus are disclosed, wherein a print head die includes a slot and ribs across the slot. The ribs are recessed from one or both sides of the die.
Abstract:
An interdigitated back contact solar cell is provided. The solar cell comprises a solar cell substrate having a light receiving frontside and a backside comprising base and emitter regions. A first level metal (Ml) layer is positioned on the substrate backside contacting the base and emitter regions. A second level metal (M2) layer is connected to the first level metal (Ml) layer and comprises a base busbar and an emitter busbar. The first level metal comprises substantially orthogonal interdigitated metallization and substantially parallel interdigitated metallization positioned under and corresponding to the base and emitter busbars on the second level metal (M2). The substantially parallel interdigitated metallization of Ml collects carriers of opposite polarity of the corresponding busbar.
Abstract:
Fabrication methods and structures relating to multi-level metallization of solar cells are described. In one embodiment, a back contact solar cell comprises a substrate having a substrate having a light receiving frontside surface and a backside surface for forming patterned emitter and non-nested base regions. Interdigitated doped emitter and base regions are formed on a backside surface of a crystalline semiconductor substrate. A patterned electrically insulating layer stack comprising a combination of at least a doped layer and an undoped capping layer is formed on the patterned doped emitter and base regions. A contact metallization pattern is formed comprising emitter metallization electrodes contacting the emitter regions and non-nested base metallization electrodes contacting the base regions wherein the non-nested base metallization electrodes are allowed to go beyond the base regions to overlap at least a portion of said patterned insulator without causing electrical shunts in the solar cell.