公开(公告)号：WO2007103949A3

公开(公告)日：2008-06-19

申请号：PCT/US2007063429

申请日：2007-03-06

Applicant: STABLCORE INC ,  VASOYA KALU K

Inventor： VASOYA KALU K

IPC: B32B15/00

CPC classification number: H05K3/4641 ,  H05K1/0366 ,  H05K3/429 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/068

Abstract: Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.

Abstract translation: 公开了包括涉及单层压循环的导电约束芯的印刷线路板的制造方法。 本发明方法的一个实例包括在导电约束芯中钻出间隙图案，将导电约束芯堆叠起来，其包括在约束的任一侧上的电介质材料的B阶（半固化）层 芯层和另外的材料层，以形成至少一个功能层，在叠层上执行层压循环，导致电介质的B级（半固化）层中的树脂回流并填充在 导电约束芯在固化和钻孔电镀通孔之前。

公开(公告)号：WO2007103949A2

公开(公告)日：2007-09-13

申请号：PCT/US2007/063429

申请日：2007-03-06

Applicant: STABLCORE, INC. ,  VASOYA, Kalu, K.

Inventor： VASOYA, Kalu, K.

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K3/4641 ,  H05K1/0366 ,  H05K3/429 ,  H05K2201/0281 ,  H05K2201/0323 ,  H05K2201/068

Abstract: Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.

Abstract translation: 公开了包括涉及单层压循环的导电约束芯的印刷线路板的制造方法。 本发明的方法的一个实例包括在导电约束芯中钻出间隙图案，将导电约束芯堆叠起来，其包括在约束的任一侧上的电介质材料的B阶（半固化）层 芯层和另外的材料层，以形成至少一个功能层，在叠层上执行层压循环，导致电介质的B级（半固化）层中的树脂回流并填充在 导电约束芯在固化和钻孔电镀通孔之前。

公开(公告)号：EP1862040A4

公开(公告)日：2009-11-04

申请号：EP06738633

申请日：2006-03-15

Applicant: STABLCORE INC

Inventor： VASOYA KALU K

IPC: H05K3/30

CPC classification number: H05K3/4641 ,  H05K1/0269 ,  H05K3/0008 ,  H05K3/0047 ,  H05K3/0082 ,  H05K3/064 ,  H05K3/4638 ,  H05K2201/0281 ,  H05K2201/029 ,  H05K2201/0323 ,  H05K2201/068 ,  H05K2201/09063 ,  H05K2201/0969 ,  H05K2201/09718 ,  H05K2203/056 ,  H05K2203/166 ,  H05K2203/167 ,  Y10T156/1062