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公开(公告)号：KR100789360B1
公开(公告)日：2007-12-28
申请号：KR1020060120680
申请日：2006-12-01
Applicant: (주) 알엔투테크놀로지
Abstract: A ceramic chip antenna is provided to implement miniaturization by inserting a grounding capacitance and a grounding in an inside of the chip antenna. A ceramic chip antenna includes a chip body, a radiation part(200), an input terminal(400), a grounding terminal(500), and a coupling feeding part. The chip body is formed by a dielectric substance having a specific dielectric constant. The radiation part is formed by a conductor of a helical shape in an inside of the chip body. The input terminal is placed at an end of the chip body and receives an external voltage. The grounding terminal is placed at a surface of an end of the chip body and connected with an external ground. The coupling feeding part is connected with the input terminal and the grounding terminal and transmits the external voltage inputted from the input terminal using the capacitance coupling.
Abstract translation: 提供陶瓷芯片天线，通过在芯片天线的内部插入接地电容和接地来实现小型化。 陶瓷芯片天线包括芯片体，辐射部分（200），输入端子（400），接地端子（500）和耦合馈电部分。 芯片体由具有特定介电常数的电介质形成。 辐射部分由芯片体内部的螺旋形导体形成。 输入端子放置在芯片主体的一端并接收外部电压。 接地端子放置在芯片主体的端部的表面并与外部接地连接。 耦合馈电部分与输入端子和接地端子连接，并使用电容耦合传输从输入端子输入的外部电压。
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公开(公告)号：KR100650186B1
公开(公告)日：2006-11-24
申请号：KR1020040029055
申请日：2004-04-27
Applicant: (주) 알엔투테크놀로지
IPC: H03H7/30
Abstract: 본 발명은 멀티 밴드 필터에 관한 것으로, 제1 내지 제3 주파수 대역을 통과시키는 이 멀티 밴드 필터는, 제1 공진 회로를 포함하며 제1 및 제2 주파수 대역을 통과시키는 제1 필터, 제2 공진 회로와 제1 커패시터를 포함하며 제1 주파수 대역을 통과시키는 제2 필터, 제2 커패시터와 제3 공진 회로와 제1 인덕터를 포함하며 제2 주파수 대역을 통과시키는 제3 필터, 그리고 제3 커패시터와 제4 공진 회로와 제2 인덕터를 포함하며 제3 주파수 대역을 통과시키는 제4 필터를 포함한다. 이 멀티 밴드 필터에 의하면 원하는 주파수 대역에서 저손실과 고감쇄 특성을 갖게 할 수 있으며, 노치의 위치를 자유롭게 조절할 수 있어서 통과 주파수 대역에서 특성을 향상시킬 수 있다. 또한 이 멀티 밴드 필터를 하나의 칩 형태로 구현함으로써 실장 비용과 시간을 절감할 수 있고, 크기를 작게 할 수 있다.
멀티 밴드 필터, 인덕터, 커패시터, 노치, 주파수, LTCC, 공진 회로-
公开(公告)号：KR101420193B1
公开(公告)日：2014-07-17
申请号：KR1020120140235
申请日：2012-12-05
Applicant: (주) 알엔투테크놀로지
Abstract: 본 발명은, 삽입 손실 등의 특성을 개선할 수 있는 비대칭 결합 선로를 가지는 결합기를 제공한다. 본 발명의 일실시예에 따른 결합기는, 접지 전극들과 외부와의 전원 연결을 위한 포트 전극들을 각각 자신의 상면과 및 하면에 포함하는 결합기 본체; 결합기 본체의 내부에 위치하고, 포트 전극의 일부와 전기적으로 연결되는 제1 결합 선로; 결합기 본체의 내부에 위치하고, 포트 전극의 다른 일부와 전기적으로 연결되고, 제1 결합 선로와 비대칭인 형상을 가지는 제2 결합 선로; 및 접지 전극들과 전기적으로 연결된 내부 접지 패턴;을 포함한다.
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公开(公告)号：KR101310745B1
公开(公告)日：2013-09-25
申请号：KR1020110146534
申请日：2011-12-29
Applicant: (주) 알엔투테크놀로지
IPC: H01P5/08
CPC classification number: H01P5/08 , H01P3/088 , H01P5/184 , H01P5/19 , H03D9/0633
Abstract: PURPOSE: A combiner with a spiral coupling line is provided to improve insertion loss, reflection loss, isolation and phase balance characteristics. CONSTITUTION: A combiner main body comprises ground electrodes (120) and port electrodes for connecting a power source with the outside. A coupled line (310) with a double spiral structure is positioned inside the combiner main body. The coupled line is connected electrically with a port line (210) through a first via in the central part of a spiral shape. The coupled line is mounted on a printed circuit board through a quarter port via hole. An input-output stub (320) is electrically and/or physically connected to the quarter port via hole. Internal ground patterns (220,230) are connected electrically with the ground electrode.
Abstract translation: 目的：提供具有螺旋耦合线的组合器，以提高插入损耗，反射损耗，隔离和相位平衡特性。 构成：组合器主体包括用于将电源与外部连接的接地电极（120）和端口电极。 具有双螺旋结构的耦合线（310）位于组合器主体内部。 耦合线通过在螺旋形状的中心部分中的第一通孔与端口线（210）电连接。 耦合线通过四分之一端口通孔安装在印刷电路板上。 输入输出短截线（320）电和/或物理地连接到四分之一端口通孔。 内部接地图（220,230）与接地电极电连接。
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公开(公告)号：KR101282316B1
公开(公告)日：2013-07-09
申请号：KR1020110146535
申请日：2011-12-29
Applicant: (주) 알엔투테크놀로지
IPC: H01Q1/24
CPC classification number: H01Q1/2283 , H01Q1/243 , H01Q1/38 , H01Q7/04
Abstract: PURPOSE: A chip antenna including a magnetic substrate is provided to prevent a noise by forming an antenna pattern in a printing method on a magnetic substrate. CONSTITUTION: A magnetic substrate (10) has a first side and a second side facing each other. An antenna pattern (20) comprises a spiral pattern, a first penetration pattern, and an extension pattern. The spiral pattern has an inner end part and an outer end part. The first penetration pattern penetrates through the magnetic substrate. First and second input-output terminals (32, 34) are connected electrically with the antenna pattern.
Abstract translation: 目的：提供一种包括磁性基板的芯片天线，以通过在磁性基板上以印刷方式形成天线图案来防止噪声。 构成：磁性基板（10）具有彼此相对的第一面和第二面。 天线图案（20）包括螺旋图案，第一穿透图案和延伸图案。 螺旋图案具有内端部和外端部。 第一穿透图案穿透磁性基底。 第一和第二输入输出端子（32,34）与天线图案电连接。
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Patent Agency Ranking
公开(公告)号：KR1020090034059A
公开(公告)日：2009-04-07
申请号：KR1020070099209
申请日：2007-10-02
Applicant: (주) 알엔투테크놀로지
IPC: H01P5/107
CPC classification number: H01P5/107 , H01P5/184 , H01P5/19 , H03D9/0633
Abstract: A coupler with stubs is provided to reduce the reflection loss without increasing the insertion loss of coupler by controlling the size and form of the stub formed in the port line. The main body of coupler is made of the ceramic dielectric. The main body of coupler prints the port electrode pattern connected to the end for outside and electric power supply. The strip coupled line(600) is formed in the inner part of the main body of coupler. Port lines(701, 703, 705, 707) are formed in the inner part of the main body of coupler. The port line connects electrically the strip coupled line with the port electrode pattern. Stubs(801, 803, 805, 807) are formed in the port line. Capacitance is generated in the port line.
Abstract translation: 提供具有短截线的耦合器以通过控制端口线中形成的短截线的尺寸和形式来减小反射损耗而不增加耦合器的插入损耗。 耦合器的主体由陶瓷电介质制成。 耦合器的主体打印连接到端部的外部电源和电源的端口电极图案。 带状连接线（600）形成在耦合器主体的内部。 端口线（701,703,705,707）形成在耦合器主体的内部。 端口线将条带耦合线与端口电极图案电连接。 在端口线上形成有桩（801,803,805,807）。 端口线产生电容。
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公开(公告)号：KR1020140072570A
公开(公告)日：2014-06-13
申请号：KR1020120140235
申请日：2012-12-05
Applicant: (주) 알엔투테크놀로지
Abstract: Provided in the present invention is a coupler having an asymmetry coupled line improving the properties like the insertion loss, etc. The coupler according to an embodiment of the present invention comprises: a coupler main body separately including port electrodes for the power connection of ground electrodes and the outside on the upper side and the lower side; a first coupled line electrically connected to one part of a port electrode, and positioned inside the coupler main body; a second coupled line electrically connected to the other part of the port electrode, positioned inside the coupler main body, and having an asymmetric shape to the first coupled line; and an internal ground pattern electrically connected to the ground electrodes.
Abstract translation: 本发明提供一种具有改善诸如插入损耗等性质的不对称耦合线的耦合器。根据本发明实施例的耦合器包括：耦合器主体，分别包括用于接地电极的电源连接的端口电极 上侧和下侧的外侧; 电连接到端口电极的一部分并且位于耦合器主体内部的第一耦合线; 电连接到端口电极的另一部分，位于耦合器主体内部并且具有与第一耦合线不对称形状的第二耦合线; 以及电连接到接地电极的内部接地图案。
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公开(公告)号：KR1020090072461A
公开(公告)日：2009-07-02
申请号：KR1020070140580
申请日：2007-12-28
Applicant: (주) 알엔투테크놀로지
Abstract: A coupler is provided to reduce reflection loss without increase of insertion loss by controlling a size and a shape of an inner ground layer formed between coupled lines. A coupler includes a coupler main body, two micro strip transmitting lines, and a ground layer. The coupler main body is made of ceramic dielectric. A ground electrode and a port electrode pattern are formed on a top surface and a bottom surface of the coupler main body. Two micro strip transmitting lines are formed inside the coupler main body. Two micro strip transmitting lines are broadside-coupled in order to form coupled lines(601,603) and port lines(701,703,705,707). The ground layer is positioned between two micro strip lines. The ground layer is connected to the ground electrode of the top surface and the bottom surface of the coupler main body.
Abstract translation: 提供耦合器以通过控制形成在耦合线之间的内部接地层的尺寸和形状来减少反射损耗而不增加插入损耗。 耦合器包括耦合器主体，两个微带传输线和接地层。 耦合器主体由陶瓷电介质制成。 接地电极和端口电极图案形成在耦合器主体的顶表面和底表面上。 两个微带传输线形成在耦合器主体内部。 两个微带传输线被宽侧耦合以形成耦合线（601,603）和端口线（701,703,705,707）。 接地层位于两条微带线之间。 接地层连接到耦合器主体的顶表面和底表面的接地电极。
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公开(公告)号：KR100650375B1
公开(公告)日：2006-11-27
申请号：KR1020050088717
申请日：2005-09-23
Applicant: (주) 알엔투테크놀로지
IPC: H01Q11/08
Abstract: A helical chip antenna having a stub is provided to decrease a center frequency by increasing the total length of a conductor without reducing a bandwidth. A chip body(110) is formed of one of a ceramic dielectric or a magnetic material. A helical conductor(120) is formed spirally in the inside of the chip body. A stub is formed in a part of the helical conductor. A feeding terminal(130) is formed at one end of the helical conductor, and applies an external voltage to the helical conductor and the stub.
Abstract translation: 提供具有短截线的螺旋形芯片天线以通过在不减小带宽的情况下增加导体的总长度来减小中心频率。 芯片主体（110）由陶瓷电介质或磁性材料中的一种形成。 螺旋导体（120）螺旋地形成在芯片主体的内部。 短截线形成在螺旋导体的一部分中。 馈电端子（130）形成在螺旋导体的一端，并且向螺旋导体和短截线施加外部电压。
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公开(公告)号：KR1020040025177A
公开(公告)日：2004-03-24
申请号：KR1020020057019
申请日：2002-09-18
Applicant: (주) 알엔투테크놀로지
IPC: C04B35/495 , C04B37/04 , H01B3/12
CPC classification number: H01B3/12 , C04B37/04 , H01G4/1209 , H01G4/30
Abstract: PURPOSE: Provided is a low temperature co-firing dielectric ceramic composition, which has a high dielectric constant, low dielectric loss and excellent stability of dielectric constant against temperature so as to reduce the volume of multilayer ceramic module-type electronic components and to improve the characteristic property of the component. CONSTITUTION: The ceramic composition comprises: (a) x(Ba,Sr)O·y(Ti,Zr)O2·z(Nb,Ta)2O5 as a main component, (b) a firing aid, and (b) a bonding modifier, wherein the main component is represented by the formula of x(aBaO,(1-a)SrO)·y(bTiO 2,(1-b)ZrO2)·z(cNb2O5,(1-c)Ta2O5), in which 0.15
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