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公开(公告)号：KR101872582B1
公开(公告)日：2018-06-28
申请号：KR1020160034146
申请日：2016-03-22
Applicant: 삼성전기주식회사
CPC classification number: H01G4/306 , H01G4/01 , H01G4/012 , H01G4/12 , H01G4/232 , H01G4/236 , H01G4/33 , H01L23/481
Abstract: 본발명의일 실시형태는기판상에복수의유전체층과제1 및제2 내부전극이번갈아배치된세라믹바디및 상기세라믹바디의외측에배치된제1 및제2 외부전극을포함하며, 상기세라믹바디내에는복수의비아가배치되고, 상기복수의비아중 제1 비아는상기제1 내부전극과제1 외부전극을연결하되, 세라믹바디의일면에서상기기판에인접한최하층제1 내부전극까지관통하고, 상기복수의비아중 제2 비아는상기제2 내부전극과제2 외부전극을연결하되, 세라믹바디의일면에서상기기판에인접한최하층제2 내부전극까지관통하며, 상기복수의비아는다단형상이고, 각단의폭은기판에서세라믹바디의상부로갈수록커지는적층세라믹커패시터를제공한다.
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公开(公告)号：KR1020170003112A
公开(公告)日：2017-01-09
申请号：KR1020150093341
申请日：2015-06-30
Applicant: 삼성전기주식회사
IPC: H01L25/11 , H01L25/16 , H01L23/485 , H01L23/02
Abstract: 본발명은전력반도체모듈및 그제조방법에관한것이다. 이와같은본 발명은일면이개방된통 형상으로수용부와다수의관통홀이구비된하우징; 상기수용부에수용되는제1 기판; 및상기다수의관통홀에해당하는각각의전력반도체칩들이위치하도록상기하우징의후면에부착된제2 기판을포함한다. 또한, 본발명은 (A) 일면이개방된통 형상으로수용부와다수의관통홀이구비된하우징을준비하는단계; (B) 제어반도체칩이실장된제 1 기판을상기수용부에실장하는단계; 및 (C) 상기다수의관통홀에해당하는각각의전력반도체칩들이위치하도록상기하우징의후면에제2 기판을부착하는단계를포함한다.그결과, 본발명은전력반도체칩들의거리를조정하여간섭으로인한온도상승을억제하며, 제1 기판의노출면을최대한확장되도록하여방열효율을높일수 있다.
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公开(公告)号：KR1020130115811A
公开(公告)日：2013-10-22
申请号：KR1020120038479
申请日：2012-04-13
Applicant: 삼성전기주식회사
IPC: H01L23/34 , H01L23/535
CPC classification number: H01L23/3735 , H01L23/467 , H01L23/473 , H01L23/4985 , H01L2224/45139 , H01L2224/48091 , H01L2224/48227 , H01L2924/1305 , H01L2924/13055 , H01L2924/19105 , H01L2924/00014 , H01L2924/00
Abstract: PURPOSE: A double side cooling power semiconductor module and a multi-stacked power semiconductor module package using the same are provided to reduce a thermal resistance interface by integrating an electrical circuit line with a cooling device. CONSTITUTION: A second cooling device (120) is formed on one side of a first cooling device. A circuit substrate (140) is formed on one side of the second cooling device. A second semiconductor chip (150) is mounted on the circuit substrate. A flexible printed circuit board (160) has a circuit layer. The circuit layer electrically connects a first semiconductor chip and the second semiconductor chip.
Abstract translation: 目的：提供双面冷却功率半导体模块和使用其的多层功率半导体模块封装，以通过将电路线与冷却装置集成来减少热阻接口。 构成：在第一冷却装置的一侧上形成第二冷却装置（120）。 电路基板（140）形成在第二冷却装置的一侧。 第二半导体芯片（150）安装在电路基板上。 柔性印刷电路板（160）具有电路层。 电路层电连接第一半导体芯片和第二半导体芯片。
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公开(公告)号：KR101119259B1
公开(公告)日：2012-03-20
申请号：KR1020100002828
申请日：2010-01-12
Applicant: 삼성전기주식회사
IPC: H01L23/34
CPC classification number: H01L2924/0002 , H01L2924/00
Abstract: 본 발명은 하이브리드형 방열기판에 관련된 것으로, 캐비티가 형성된 금속코어층과 상기 캐비티에 위치하는 수지코어층이 하나의 코어층을 형성하며, 금속코어층 상에 발열소자를 실장하고, 수지코어층 상에 열 취약소자를 실장하여, 방열성은 유지하되 열 취약소자를 발열소자에서 발생한 열로부터 보호할 수 있다.
또한, 본 발명은 상기 하이브리드형 방열기판의 제조방법에 관련된다.-
公开(公告)号：KR1020110014867A
公开(公告)日：2011-02-14
申请号：KR1020090072440
申请日：2009-08-06
Applicant: 삼성전기주식회사
CPC classification number: H01L23/24 , H01L23/04 , H01L23/13 , H01L23/142 , H01L23/36 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/072 , H01L2224/32225 , H01L2224/48091 , H01L2224/48137 , H01L2224/48139 , H01L2224/48227 , H01L2224/73265 , H01L2224/8384 , H01L2924/00014 , H01L2924/01078 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/15153 , H01L2924/15165 , H01L2924/1532 , H01L2924/16195 , H01L2924/181 , H01L2924/19107 , H01L23/28 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: PURPOSE: A power device package and a fabricating method of the same are provided to increase thermal conductivity while making the device thin by forming a metal plate with thinner than an insulating layer. CONSTITUTION: A cavity for a power device mounting is formed in a metal plate(110). The metal plate is functioned as a heat-sinking member releasing heat from the power device(130). A circuit layer(120) comprises an internal circuit layer(120a) formed in the inner wall of cavity and external circuit layer(120b). The external circuit layer is formed to be extended on the surface of the metal plate. The resin-seal(140) protects the power device from the external environment.
Abstract translation: 目的：提供一种功率器件封装及其制造方法，以通过形成具有比绝缘层更薄的金属板来使器件变薄而增加导热性。 构成：用于功率器件安装的空腔形成在金属板（110）中。 金属板用作从动力装置（130）释放热量的散热构件。 电路层（120）包括形成在空腔和外部电路层（120b）的内壁中的内部电路层（120a）。 外部电路层形成为在金属板的表面上延伸。 树脂密封件（140）保护动力装置免受外部环境的影响。
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Patent Agency Ranking
公开(公告)号：KR1020100126909A
公开(公告)日：2010-12-03
申请号：KR1020090045332
申请日：2009-05-25
Applicant: 삼성전기주식회사
CPC classification number: H01L23/467 , H01L23/142 , H01L23/24 , H01L23/3735 , H01L23/427 , H01L25/071 , H01L25/072 , H01L2224/32225 , H01L2224/45124 , H01L2224/48091 , H01L2224/48137 , H01L2224/48139 , H01L2224/48227 , H01L2224/4846 , H01L2224/48472 , H01L2224/73265 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
Abstract: PURPOSE: A power semiconductor module is provided to improve radiation performance by including a cooling member in a metal plate. CONSTITUTION: An anode oxidation layer(114) is formed on the surface of an anode oxidation metallic plate(110). The anode oxidation layer is formed by applying an anode to a metal plate(112). A circuit layer(116a) is formed in the anode oxidation layer. The circuit layer is connected to a power device(120a) through a second wire(126a). The power device is attached to the circuit layer through soldering.
Abstract translation: 目的：提供功率半导体模块以通过在金属板中包括冷却构件来改善辐射性能。 构成：在阳极氧化金属板（110）的表面上形成阳极氧化层（114）。 阳极氧化层通过将阳极施加到金属板（112）而形成。 在阳极氧化层中形成电路层（116a）。 电路层通过第二线（126a）连接到功率器件（120a）。 电源设备通过焊接连接到电路层。
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公开(公告)号：KR100638892B1
公开(公告)日：2006-10-27
申请号：KR1020050098500
申请日：2005-10-19
Applicant: 삼성전기주식회사
IPC: H01L33/54
Abstract: A method for fabricating an LED package is provided to increase the quantity of light extracted from a resin molding part by performing a plasma treatment on the surface of the resin molding part so that a fine unevenness is formed. A package substrate is prepared which includes a mounting region of a light emitting diode and a metal interconnection connected to the light emitting diode(21). A light emitting diode is mounted on a mounting region of the package substrate to be connected to the metal interconnection(23). A resin molding part is formed in the mounting region of the light emitting diode to seal the light emitting diode(25). A plasma treatment is performed on the surface of the resin molding part to form a plurality of fine unevennesses for light dispersion on the surface of the resin molding part(27). The resin molding part is made of epoxy resin, silicon-based resin, urethane-based resin or a composition thereof.
Abstract translation: 提供一种用于制造LED封装的方法，以通过在树脂模制部件的表面上执行等离子体处理来增加从树脂模制部件提取的光的量，从而形成精细的不平整。 制备包括发光二极管的安装区域和连接到发光二极管（21）的金属互连的封装衬底。 发光二极管安装在封装基板的安装区域上以连接到金属互连（23）。 树脂模制部分形成在发光二极管的安装区域中以密封发光二极管（25）。 在树脂模制部件的表面上执行等离子体处理，以在树脂模制部件（27）的表面上形成多个用于光散射的微小不平坦部分。 树脂模塑部件由环氧树脂，硅基树脂，聚氨酯基树脂或其组合物制成。
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公开(公告)号：KR1020170109924A
公开(公告)日：2017-10-10
申请号：KR1020160034146
申请日：2016-03-22
Applicant: 삼성전기주식회사
CPC classification number: H01G4/306 , H01G4/01 , H01G4/012 , H01G4/12 , H01G4/232 , H01G4/236 , H01G4/33 , H01L23/481
Abstract: 본발명의일 실시형태는기판상에복수의유전체층과제1 및제2 내부전극이번갈아배치된세라믹바디및 상기세라믹바디의외측에배치된제1 및제2 외부전극을포함하며, 상기세라믹바디내에는복수의비아가배치되고, 상기복수의비아중 제1 비아는상기제1 내부전극과제1 외부전극을연결하되, 세라믹바디의일면에서상기기판에인접한최하층제1 내부전극까지관통하고, 상기복수의비아중 제2 비아는상기제2 내부전극과제2 외부전극을연결하되, 세라믹바디의일면에서상기기판에인접한최하층제2 내부전극까지관통하며, 상기복수의비아는다단형상이고, 각단의폭은기판에서세라믹바디의상부로갈수록커지는적층세라믹커패시터를제공한다.
Abstract translation: 本发明的一个实施例包括设置在所述多个电介质层的任务1个mitje第二内部电极是一个陶瓷体和在基片上交替地布置在陶瓷主体的外侧的第一mitje第二外部电极，所述多个是在陶瓷主体 琼脂UIBI被放置，所述多个通孔的是经由所述第一内部电极的任务1的第一，但连接至外部电极，在陶瓷主体的一侧并通过对所述第一内部电极的最下层是邻近衬底，多个通孔的 第二通路是第二，但连接到电极分配第二外电极，并通过从陶瓷体向底层的一个表面上的第二内部电极是邻近衬底的，多个通孔的是一个多步骤的形状中，每一级的宽度是衬底 到陶瓷体的上部。
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公开(公告)号：KR1020140076762A
公开(公告)日：2014-06-23
申请号：KR1020120145167
申请日：2012-12-13
Applicant: 삼성전기주식회사
IPC: H01L29/78 , H01L21/336
CPC classification number: H01L29/78 , H01L29/0653 , H01L29/4175 , H01L29/41766 , H01L29/66568 , H01L29/7827 , H01L29/41725 , H01L29/0886
Abstract: The present invention relates to a power semiconductor device and a method for manufacturing the same. The power semiconductor device according to one embodiment of the present invention includes a first conductivity type body region; a second conductivity type wall which is formed in the upper part of the body region; and a conductive via which crosses the wall and is formed in the body region. According to one embodiment of the present invention, the conductive via penetrates the body region.
Abstract translation: 功率半导体器件及其制造方法技术领域本发明涉及功率半导体器件及其制造方法。 根据本发明的一个实施例的功率半导体器件包括第一导电类型的主体区域; 第二导电型壁，其形成在所述身体区域的上部; 以及穿过所述壁并形成在所述身体区域中的导电通路。 根据本发明的一个实施例，导电通孔穿透身体区域。
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