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公开(公告)号:KR1020160141470A
公开(公告)日:2016-12-09
申请号:KR1020150077175
申请日:2015-06-01
Applicant: 삼성전기주식회사
Abstract: 본발명의인쇄회로기판은, 기판상에형성된절연층; 상기절연층에 1차솔더영역및 2차솔더영역으로정의된영역에따라크기가다르게형성된접속패드; 상기절연층상에상기접속패드의소정영역이노출되도록개구부가형성된솔더레지스트층; 및상기솔더레지스트층의개구부에노출된접속패드상에형성된표면처리층을포함하여구성된다.
Abstract translation: 本发明的印刷电路板包括:形成在基板上的绝缘层; 根据由主焊料区域和次焊料区域限定的区域,形成在绝缘层中以具有不同尺寸的连接焊盘; 形成在绝缘层上并具有开口以暴露连接焊盘的预定区域的阻焊层; 并且形成在暴露在阻焊层的开口中的连接焊盘上的表面处理层。
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公开(公告)号:KR1020160028118A
公开(公告)日:2016-03-11
申请号:KR1020140116683
申请日:2014-09-03
Applicant: 삼성전기주식회사
IPC: H05K3/46
CPC classification number: H05K3/243 , H05K1/0298 , H05K3/244 , H05K3/26 , H05K2203/072
Abstract: 서로다른종류의표면처리가이루어진제1 도체패턴과제2 도체패턴이구비된회로기판이개시된다. 일실시예에따른회로기판은, 절연층표면에제1 도체패턴과제2 도체패턴이구비되되, 상기제1 도체패턴의표면에는제1 금속도금층과제2 금속도금층이구비되고, 상기제2 도체패턴의표면에는제2 금속도금층이구비되며, 상기제2 금속도금층은제1 금속도금층과다른물질로이루어져외부로노출되며, 패턴피치감소에유리하고, 표면처리로인한전기적특성의감소를최소화할수 있으며, 제조공정의효율성이향상될수 있다.
Abstract translation: 公开了具有形成有不同表面处理的第一导电图案和第二导电图案的电路板。 根据本发明的实施例,电路板包括:第一导电图案和设置在绝缘层的表面中的第二导电图案。 第一金属镀层和第二金属镀层设置在第一导电图案的表面中。 第二金属镀层由与第一金属镀层不同的材料构成,暴露于外部。 因此,电路板有利于降低图案间距,并且可以最小化由于表面处理引起的电特性的降低,从而提高制造工艺的效率。
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公开(公告)号:KR1020140021415A
公开(公告)日:2014-02-20
申请号:KR1020120087941
申请日:2012-08-10
Applicant: 삼성전기주식회사
CPC classification number: H01L21/78 , H01L21/2007
Abstract: The present invention provides a silicone substrate including first and second silicone substrates having bonding surfaces corresponding to each other; a silicon dioxide film between the first and second silicone substrates with one or more trenches connected to the outside; and a sealing part formed at the end of the trenches by the oxidation of the silicon dioxide film.
Abstract translation: 本发明提供一种硅酮基材,其包含具有彼此对应的粘合表面的第一和第二硅酮基材; 第一和第二硅树脂基底之间的二氧化硅膜,其中一个或多个沟槽连接到外部; 以及通过二氧化硅膜的氧化在沟槽的端部形成的密封部。
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公开(公告)号:KR1020130056629A
公开(公告)日:2013-05-30
申请号:KR1020110122342
申请日:2011-11-22
Applicant: 삼성전기주식회사
Abstract: PURPOSE: A substrate and a manufacturing method thereof are provided to improve stability of electroless palladium by including a surface plating layer which is plated with reduced electroless gold on wirings of the substrate. CONSTITUTION: A substrate includes a circuit pattern(10), a nickel layer(20), a gold layer(30), a palladium layer(40), and a surface gold plating layer(50). The circuit pattern is formed with copper or silver. The substrate includes a connection terminal to the outside. The connection terminal is formed by solder bonding or wire bonding.
Abstract translation: 目的:提供一种基板及其制造方法,以通过包括在基板的布线上镀有还原的无电金的表面镀层来提高化学镀钯的稳定性。 构成:基板包括电路图案(10),镍层(20),金层(30),钯层(40)和表面镀金层(50)。 电路图案由铜或银形成。 基板包括到外部的连接端子。 连接端子通过焊接或引线键合形成。
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公开(公告)号:KR1020120078181A
公开(公告)日:2012-07-10
申请号:KR1020100140398
申请日:2010-12-31
Applicant: 삼성전기주식회사
Abstract: PURPOSE: An electroless Ni/Pd/Au plated structure is provided to improve soldering reliability by controlling the content of P in electroless Ni-plated and Pd-plated films. CONSTITUTION: An electroless Ni/Pd/Au plated structure comprises an electroless Ni-plated film, an electroless Pd-plated film, and an electroless Au-plated film. The thickness of the electroless Ni, Pd, and Au-plated films is 0.01-0.1 micrometers. Less than 5 weight% of phosphorus is contained in the electroless Ni and Pd plated films.
Abstract translation: 目的:提供无电Ni / Pd / Au镀层结构,通过控制无电解镀镍和镀Pd膜中的P含量来提高焊接的可靠性。 构成:无电Ni / Pd / Au镀层结构包括无电解镀镍膜,无电解Pd镀膜和无电镀金膜。 化学镀Ni,Pd和镀Au膜的厚度为0.01-0.1微米。 化学镀镍和Pd镀膜中含有少于5重量%的磷。
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公开(公告)号:KR1020120049727A
公开(公告)日:2012-05-17
申请号:KR1020100111134
申请日:2010-11-09
Applicant: 삼성전기주식회사
Abstract: PURPOSE: A primer for electroless metal plating and a circuit board manufacturing method using the same are provided to improve the catalyst residue removing performance of a primer and prevent bridge between patterns of a circuit caused by the precipitation of electroless plating. CONSTITUTION: A method for manufacturing a circuit board comprises the steps of: spreading an electroless metal plating catalyst on a base plate, removing the catalyst from the insulating layer of the base plate using a primer for electroless metal plating, and forming a metal plated layer on the base plate through electroless metal plating. The primer comprises nitrogen compound(101), surfactant(102), sulfur compound(103), and anti-catalyst(104).
Abstract translation: 目的:提供一种无电金属电镀底漆和使用该底漆的电路板制造方法,以提高底漆的催化剂残渣去除性能,并防止化学镀沉淀引起的电路图案之间的桥接。 一种电路板的制造方法,其特征在于,包括以下步骤:在基板上涂布无电金属电镀催化剂,使用无电金属电镀用底漆从基板的绝缘层除去催化剂,形成金属镀层 通过无电金属电镀在基板上。 底漆包括氮化合物(101),表面活性剂(102),硫化合物(103)和抗催化剂(104)。
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