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公开(公告)号：WO2018155966A1
公开(公告)日：2018-08-30
申请号：PCT/KR2018/002289
申请日：2018-02-23
Applicant: 삼성전자주식회사
Abstract: 본 개시(disclosure)는 일반적으로 무선 통신 시스템에서 기지국들 간 데이터 재전송을 위한 것으로, 기지국의 동작 방법은, 다른 기지국으로부터 미수신 패킷들에 대한 정보를 수신하는 과정과, 상기 다른 기지국으로, 상기 수신된 정보에 기반하여 상기 미수신 패킷들 중 적어도 하나의 미수신 패킷을 재전송하는 과정을 포함한다. 이 때, 상기 적어도 하나의 미수신 패킷은, 상기 미수신 패킷들의 식별번호와 상기 다른 기지국으로 전송한 마지막 패킷의 식별번호의 차이 값에 기반하여 결정된다.
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公开(公告)号：KR1020170022772A
公开(公告)日：2017-03-02
申请号：KR1020150118203
申请日：2015-08-21
Applicant: 삼성전자주식회사
IPC: H04W28/02 , H04L12/823 , H04L12/851 , H04W88/08
Abstract: 본개시는 LTE와같은 4G 통신시스템이후보다높은데이터전송률을지원할 5G 또는 pre-5G 통신시스템에관련된것이다. 본발명의실시예에따르면, 무선통신시스템에서기지국의혼잡제어방법에있어서, 상향링크에대한혼잡제어필요여부를판단하는단계, 상향링크에대한혼잡제어가필요한것으로판단하면, 혼잡제어적용대상단말을결정하는단계및 혼잡제어적용대상단말로결정된단말에대하여혼잡제어를수행하는단계를포함하는것을특징으로하는방법을제공할수 있다.
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公开(公告)号：KR101665556B1
公开(公告)日：2016-10-13
申请号：KR1020090112254
申请日：2009-11-19
Applicant: 삼성전자주식회사
CPC classification number: H01L23/488 , H01L23/49816 , H01L24/73 , H01L25/105 , H01L2224/16225 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48225 , H01L2224/48227 , H01L2224/73265 , H01L2225/06572 , H01L2225/1023 , H01L2225/1058 , H01L2924/14 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/00 , H01L2924/00012
Abstract: 인쇄회로기판및 반도체칩을갖는반도체장치를제공한다. 상기인쇄회로기판은칩(chip) 영역, 상기칩 영역에인접한다수의제 1 볼랜드들(ball lands), 및상기제 1 볼랜드들에인접한적어도하나의제 2 볼랜드(ball land)를구비한다. 상기반도체칩은상기칩(chip) 영역에장착된다. 상기다수의제 1 볼랜드들은제 1 피치(pitch)를갖도록배열된다. 상기다수의제 1 볼랜드들중 상기제 2 볼랜드(ball land)에가장가까운하나와상기제 2 볼랜드(ball land)는상기제 1 피치(pitch)보다큰 제 2 피치(pitch)를갖는다.
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公开(公告)号：KR1020160072330A
公开(公告)日：2016-06-23
申请号：KR1020140179298
申请日：2014-12-12
Applicant: 삼성전자주식회사
CPC classification number: H01L23/49827 , H01L21/486 , H01L23/49811 , H01L23/49894 , H01L24/00 , H01L2924/0002 , H01L2924/00 , H01L23/48 , H01L23/34 , H01L23/481
Abstract: 본발명은반도체패키지를제공한다. 반도체패키지는반도체칩이실장되는상부면과그 반대면인하부면을갖는패키지기판, 상기패키지기판내에임베딩되고, 상기패키지기판을관통하는전원통로와접지통로를각각제공하는전원블록과그라운드블록, 상기전원블록및 상기그라운드블록각각으로부터연장되어상기반도체칩에전기적으로연결되는제 1 비아, 상기전원블록및 상기그라운드블록각각으로부터상기패키지기판의하부면을향해연장되는제 2 비아및 상기전원블록과상기그라운드블록을각각관통하여상기반도체칩에전기적으로연결되고, 상기전원블록과상기그라운드블록각각과전기적으로절연된블록비아를포함한다.
Abstract translation: 本发明涉及半导体封装。 本发明涉及半导体封装。 半导体封装包括：封装衬底，其具有安装半导体芯片的上表面和与其相对的下表面; 电源块和接地块，其分别嵌入在所述封装基板中，并分别提供通过所述封装基板的电源通路和接地通路; 第一通孔，其从每个电源块和接地块延伸并且电连接到半导体芯片; 第二通孔，其从所述电源块和所述接地块朝向所述封装基板的下表面延伸; 并且通过其中的每个电源块和接地块的块电连接到半导体芯片，并且与电源块和接地块电隔离。
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公开(公告)号：KR1020130021689A
公开(公告)日：2013-03-06
申请号：KR1020110084108
申请日：2011-08-23
Applicant: 삼성전자주식회사
CPC classification number: H01L23/06 , H01L21/563 , H01L23/10 , H01L23/3128 , H01L23/34 , H01L23/36 , H01L23/42 , H01L23/49816 , H01L23/552 , H01L23/562 , H01L25/0657 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2225/06568 , H01L2924/15311 , H01L2924/16172 , H01L2924/16251 , H01L2924/00
Abstract: PURPOSE: A semiconductor package and a manufacturing method thereof are provided to prevent the malfunction of a semiconductor chip by including a package cap which is electrically connected to a ground layer of a package substrate to block electromagnetic waves. CONSTITUTION: A package substrate(200) includes a chip mounting region and a peripheral region. A ground layer(206) is formed in the peripheral region. A first solder ball(10) is formed in the chip mounting region. A second solder ball(20) is formed in the peripheral region. A semiconductor chip(300) is mounted in the chip mounting region. A package cap(400) covers the semiconductor chip. The package cap is electrically connected to the ground layer formed in the peripheral region.
Abstract translation: 目的：提供半导体封装及其制造方法，以通过包括电连接到封装基板的接地层的封装盖来阻止电磁波来防止半导体芯片的故障。 构成：封装基板（200）包括芯片安装区域和外围区域。 在外围区域形成接地层（206）。 第一焊球（10）形成在芯片安装区域中。 在周边区域形成第二焊球（20）。 半导体芯片（300）安装在芯片安装区域中。 封装盖（400）覆盖半导体芯片。 封装帽电连接到形成在周边区域中的接地层。
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Patent Agency Ranking
公开(公告)号：KR1020120060960A
公开(公告)日：2012-06-12
申请号：KR1020100092615
申请日：2010-09-20
Applicant: 삼성전자주식회사
CPC classification number: H01L23/49811 , H01L23/49838 , H01L24/06 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/81 , H01L25/105 , H01L2224/0401 , H01L2224/06132 , H01L2224/06142 , H01L2224/13022 , H01L2224/13099 , H01L2224/14132 , H01L2224/16106 , H01L2224/16225 , H01L2224/16227 , H01L2224/1703 , H01L2224/17106 , H01L2224/48091 , H01L2224/48227 , H01L2224/81193 , H01L2224/814 , H01L2224/81815 , H01L2924/00014 , H01L2924/01006 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: PURPOSE: A semiconductor package, an electronic device, and an electronic system adopting the same are provided to improve durability and reliability of a coupling structure by suppressing cracks in a connection structure which electrically connects a substrate and a semiconductor chip structure. CONSTITUTION: A first lower conductive pattern(115) and a second lower conductive pattern(120) are formed on a first surface of a bottom substrate(105). A first lower insulation layer(135) has a first lower opening(139) and a second lower opening(154). A first lower connection structure is located on a first lower land region(152). A second lower connection structure is located on a second lower land region(155). A first upper insulation layer(235) has a first upper opening unit(239a,239b) and a second upper opening.
Abstract translation: 目的：提供半导体封装，电子器件和采用该半导体封装的电子系统，以通过抑制电连接衬底和半导体芯片结构的连接结构中的裂纹来提高耦合结构的耐久性和可靠性。 构成：在底部基板（105）的第一表面上形成第一下部导电图案（115）和第二下部导电图案（120）。 第一下部绝缘层（135）具有第一下部开口（139）和第二下部开口（154）。 第一下部连接结构位于第一下部陆部区域（152）上。 第二下连接结构位于第二较低陆地区域（155）上。 第一上绝缘层（235）具有第一上开口单元（239a，239b）和第二上开口。
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公开(公告)号：KR1020120012865A
公开(公告)日：2012-02-13
申请号：KR1020100074871
申请日：2010-08-03
Applicant: 삼성전자주식회사
Abstract: PURPOSE: A method for allocating resources of a base station in a mobile communication system and a device thereof are provided to enable a base station to allocate uplink resources as much as a maximum transmission capacity of a backhaul. CONSTITUTION: A backhaul state determining unit(330A) determines whether the backhaul is set in an overload state in a certain transmission block interval. When the backhaul is set in an overload state, a scheduler(330B) limits the amount of resources allocated to a terminal. When the backhaul is set in a normal state, the scheduler allocates resources without limiting the amount of resources allocated to the terminal. When the backhaul is in the overload state, the backhaul state determining unit maintains the overload state of the backhaul.
Abstract translation: 目的：提供一种用于在移动通信系统中分配基站的资源的方法及其装置，以使基站能够分配上行链路资源多达回程的最大传输容量。 构成：回程状态确定单元（330A）确定在某个传输块间隔内是否将回程设置为过载状态。 当回程被设置为过载状态时，调度器（330B）限制分配给终端的资源量。 当回程设置为正常状态时，调度器分配资源，而不限制分配给终端的资源量。 当回程处于过载状态时，回程状态确定单元保持回程的过载状态。
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公开(公告)号：KR1020110137653A
公开(公告)日：2011-12-23
申请号：KR1020100057694
申请日：2010-06-17
Applicant: 삼성전자주식회사
CPC classification number: H04L25/0222 , H04L12/28 , H04L41/0896
Abstract: PURPOSE: A method and a device for estimating an available bandwidth and the capacity of a network path in a communication system are provided to estimate the capacity bandwidth and physical capacity of bottle net link of a network path. CONSTITUTION: An available bandwidth probing unit increases a probing speed if the receiving speed of a plurality of packet sinker is faster than a transmission speed. If the receiving speed is slower than the transmission speed, the available bandwidth probing unit decreases the probing speed. The available bandwidth estimating unit repeats the operation which stored the points and reduces or increases the probing speed. The available bandwidth probing unit probes available bandwidth range(214). A capacity estimating unit determines the point in which the transmission speed is near to the available bandwidth to an anchor point. The capacity estimating unit estimates the bottle neck capacity by calculating the slop between the anchor and residual points(216).
Abstract translation: 目的：提供一种用于估计通信系统中的可用带宽和网络路径的容量的方法和装置，以估计网络路径的瓶网链路的容量带宽和物理容量。 构成：如果多个分组沉降片的接收速度比传输速度快，则可用带宽探测单元增加探测速度。 如果接收速度比传输速度慢，可用带宽探测单元会降低探测速度。 可用带宽估计单元重复存储点的操作并且减少或增加探测速度。 可用带宽探测单元探测可用带宽范围（214）。 容量估计单元确定传输速度接近于锚点的可用带宽的点。 容量估计单元通过计算锚点与残差点之间的斜率来估计瓶颈容量（216）。
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公开(公告)号：KR1020020057349A
公开(公告)日：2002-07-11
申请号：KR1020010000340
申请日：2001-01-04
Applicant: 삼성전자주식회사
IPC: H01L23/36
CPC classification number: H05K1/0207 , H01L23/3128 , H01L23/36 , H01L23/3677 , H01L23/49816 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/85399 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H05K1/0206 , H05K2201/066 , H05K2201/09627 , H05K2201/10734 , H01L2224/45015 , H01L2924/207 , H01L2924/00
Abstract: PURPOSE: A ball grid array package to which a heat sink is attached is provided to effectively radiate heat generated from a semiconductor chip inside a resin encapsulation part to the exterior, by using various paths for radiating the heat. CONSTITUTION: A plurality of electrode pads are formed on an active surface of a semiconductor substrate. A printed circuit board(PCB)(20) has an upper surface to which the semiconductor chip(10) is attached and a lower surface opposite to the upper surface. An electrical connecting unit electrically connects the semiconductor chip with the PCB. A resin encapsulating part(60) encapsulates the semiconductor chip on the PCB and the electrical connecting unit. The heat sink(70) is attached to the upper surface of the resin encapsulating part. A solder ball is formed on the lower surface of the PCB, electrically connected to the semiconductor chip. An interconnection pattern layer(23) has an upper interconnection layer(30), a ground layer(32) and a lower interconnection layer(33). A signal via(40) connects the solder ball pads corresponding to the substrate pad, penetrating the body(21) of the substrate and separated from the ground layer. The first heat radiating via penetrates the body of the substrate under a chip mounting region(34), connected to the ground layer. The second heat radiating via penetrates the body of the substrate under the first heat radiating layer, connected to the ground layer. The lower surface of the heat sink is attached to the upper surface of an upper radiation layer and the upper surface of the resin encapsulating part.
Abstract translation: 目的：提供安装散热片的球栅阵列封装，通过使用各种散热方式，有效地将从树脂封装部内的半导体芯片产生的热量散发到外部。 构成：在半导体衬底的有源表面上形成多个电极焊盘。 印刷电路板（PCB）（20）具有安装半导体芯片（10）的上表面和与上表面相对的下表面。 电连接单元将半导体芯片与PCB电连接。 树脂封装部分（60）将半导体芯片封装在PCB和电连接单元上。 散热器（70）附接到树脂封装部的上表面。 焊料球形成在PCB的下表面上，电连接到半导体芯片。 互连图案层（23）具有上互连层（30），接地层（32）和下互连层（33）。 信号通孔（40）连接对应于衬底焊盘的焊球焊盘，穿过衬底的主体（21）并与接地层分离。 第一散热通孔在与基底层连接的芯片安装区域（34）下穿透基体的主体。 第二散热通道穿过连接到接地层的第一散热层下的基板的主体。 散热器的下表面附着到上辐射层的上表面和树脂封装部分的上表面。
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公开(公告)号：KR101829392B1
公开(公告)日：2018-02-20
申请号：KR1020110084108
申请日：2011-08-23
Applicant: 삼성전자주식회사
CPC classification number: H01L23/06 , H01L21/563 , H01L23/10 , H01L23/3128 , H01L23/34 , H01L23/36 , H01L23/42 , H01L23/49816 , H01L23/552 , H01L23/562 , H01L25/0657 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2225/06568 , H01L2924/15311 , H01L2924/16172 , H01L2924/16251 , H01L2924/00
Abstract: 반도체패키지및 그제조방법을제공한다. 이반도체패키지는칩 실장영역및 주변영역을가지고, 주변영역에형성된그라운드층을포함하는패키지기판, 패키지기판의칩 실장영역에형성된제 1 솔더볼들, 패키지기판의주변영역에형성되고그라운드층과접하는제 2 솔더볼들, 패키지기판의칩 실장영역에적층되는적어도하나의반도체칩, 및패키지기판의주변영역과접하고반도체칩을덮는패키지캡(Package cap)을포함하되, 패키지캡은제 2 솔더볼들과전기적으로연결된다.
Abstract translation: 提供了一种半导体封装及其制造方法。 具有芯片安装区域和周边区域，所述第一焊锡球，形成在封装基板，包括形成在外围区域中的接地层的封装基板中，在芯片安装区域被形成在封装基板的周边区域中与所述接地层接触伊凡导体包 在所述至少一个半导体芯片的第二焊球层叠在封装基板的芯片安装区域，和封装基板的周边区域和所述接触包括：覆盖所述半导体芯片（封装帽）时，封装盖和所述第二焊料球的封装帽 并且电连接。
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