公开(公告)号：KR1020060025759A

公开(公告)日：2006-03-22

申请号：KR1020040074560

申请日：2004-09-17

Applicant: 삼성전자주식회사

Inventor： 김일기

IPC: H01L23/16

CPC classification number: H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/15311 ,  H01L2924/00

Abstract: 외부 충격에 강한 반도체 패키지에 관해 개시한다. 이를 위해 본 발명은 반도체 칩을 탑재할 수 있고 중앙에 슬릿(slit)이 형성된 기판과, 상기 기판 위에 회로면이 아래로 향하도록 접착수단을 통하여 탑재된 반도체 칩과, 상기 기판의 슬릿을 통하여 상기 반도체 칩의 본드패드와 상기 기판 하부를 전기적으로 연결하는 와이어와, 상기 기판 위에서 상기 반도체 칩의 주위를 포위하는 형태로 만들어진 보호수단과, 상기 기판 하부에 부착된 솔더볼을 구비하는 것을 특징으로 하는 외부 충격에 강한 반도체 패키지를 제공한다. 따라서 상기 보호수단이 외부로부터 충격이 전달되더라도 반도체 칩, 기판 및 솔더볼이 손상받는 것을 억제한다 .
WBGA 패키지, 보강재, 솔더볼, 외부 충격.

公开(公告)号：KR1020080066335A

公开(公告)日：2008-07-16

申请号：KR1020070003635

申请日：2007-01-12

Applicant: 삼성전자주식회사

Inventor： 김일기

IPC: G06K19/077 ,  H01L23/48

CPC classification number: G06K19/07724 ,  G06K19/07722

Abstract: A memory card and a manufacturing method thereof are provided to realize improve mechanical durability and strength by increasing a contact area between a molding member and a base substrate, and combining the molding member and the base substrate with the increased contact area, and prevent misalignment by aligning the molding member and the base substrate with a sill and a projected part. A PCB(Printed Circuit Board)(110) defines a central part and a surrounding part surrounding the central part. A multi-layer semiconductor chip(120) is mounted on the central part and stores data. A molding member(130) covers the semiconductor chip and the PCB, and has a lower sill(135) than an upper part of the central pat at the upper part of the surrounding part. A base card(140) is installed on the molding member, has a projected part(143) corresponding to the sill, and is facially connected to the sill. An adhesive member(150) combines the molding member and a card lead between the molding member and the base card. The sill forms a recess and the projected part of the base card includes a projection corresponding to the recess.

Abstract translation: 提供了一种存储卡及其制造方法，通过增加成型构件和基底基板之间的接触面积来实现提高机械耐久性和强度，并且通过增加接触面积来组合模制构件和基底基板，并且防止未对准 对准成型构件和基底基板，并具有门槛和突出部分。 PCB（印刷电路板）（110）限定围绕中心部分的中心部分和周围部分。 多层半导体芯片（120）安装在中心部分并存储数据。 模制构件（130）覆盖半导体芯片和PCB，并且在周围部分的上部处具有比中央拍摄的上部的下基底（135）。 基板（140）安装在成型构件上，具有与门槛相对应的突出部分（143），并且与基座相面接地。 粘合构件（150）将成型构件和卡引线组合在模制构件和基座卡之间。 基座形成凹部，并且基卡的突出部分包括对应于凹部的突起。

公开(公告)号：KR1020080058015A

公开(公告)日：2008-06-25

申请号：KR1020060132031

申请日：2006-12-21

Applicant: 삼성전자주식회사

Inventor： 김일기 ,  김해익

IPC: H01L23/02 ,  H01L23/28

CPC classification number: H01L2224/48091 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00014 ,  H01L2924/00012 ,  G06K19/0772 ,  H01L23/28 ,  H01L25/074

Abstract: A memory card having a combining structure with a protrusion is provided to prevent a card main body from being detached from a base card due to a decrease of an adhesive strength of an adhesive by combining and fixing the card main body to the base card using a protrusion formed on the base card without use of the adhesive. A memory card(100) having a combining structure with a protrusion includes: a card main body(150) and a base card(130). The card main body includes a semiconductor chip(110) enclosed in a mold portion(114) with a molding material and a printed circuit board(120) having one surface on which the semiconductor chip is mounted and the other surface on which a plurality of external contact terminals(124) are formed. The base card includes an inserting portion(134) having one side into which the card main body is inserted and the first protrusion(140) which fixes the card main body to lower ends of both sides of the inserting portion.

Abstract translation: 提供了具有与突起的组合结构的存储卡，以防止卡主体由于通过将卡主体组合并固定到基卡而使粘合剂的粘合强度降低而与基卡分离，使用 突起形成在基卡上而不使用粘合剂。 具有与突起的组合结构的存储卡（100）包括：卡主体（150）和基卡（130）。 卡主体包括封装在具有成型材料的模具部分（114）中的半导体芯片（110）和具有一个表面的印刷电路板（120），半导体芯片安装在其上，多个 形成外部接触端子（124）。 该基座卡包括一个插入部分（134），该插入部分（134）具有卡主体插入其中的一侧，以及第一凸起（140），其将卡主体固定到插入部分两侧的下端。

公开(公告)号：KR100675011B1

公开(公告)日：2007-01-29

申请号：KR1020060010919

申请日：2006-02-04

Applicant: 삼성전자주식회사

Inventor： 이두진 ,  공도일 ,  김일기

IPC: G06K19/00 ,  G06K19/067 ,  G11B20/04

Abstract: A memory card pack is provided to offer compatibility for using a memory card of a different specification in an application device like a high performance and diversified mobile device and expand capacity by utilizing a present low capacity memory card. An adaptor(100) is inserted into a memory slot of the application device and includes a semiconductor chip(104) forming a control circuit at the inside. An extended socket(200) includes multiple slots(201) for receiving the memory card(400a), and multiple connectors(202) for electrically connecting the control circuit and the memory card. The control circuit includes an interface for the application device, a CPU comprising a microprocessor, an internal memory for storing operation record of the CPU, a buffer memory for inputting/outputting data, a control logic for controlling the buffer memory, and a memory controller for controlling the memory card. The memory card is equipped with a unique controller for controlling a memory array. The control circuit is an emulator for recognizing and controlling a different kind of memory card inserted into the extended socket.

Abstract translation: 提供存储卡组件以提供兼容性，以便在诸如高性能和多样化的移动设备之类的应用设备中使用不同规格的存储卡，并通过利用当前的低容量存储卡来扩展容量。 适配器（100）插入到应用装置的存储器插槽中，并包括在内部形成控制电路的半导体芯片（104）。 扩展插座（200）包括用于接收存储卡（400a）的多个插槽（201）以及用于电连接控制电路和存储卡的多个连接器（202）。 控制电路包括用于应用装置的接口，包括微处理器的CPU，用于存储CPU的操作记录的内部存储器，用于输入/输出数据的缓冲存储器，用于控制缓冲存储器的控制逻辑以及存储器控制器 用于控制存储卡。 存储卡配备了一个独特的控制器来控制存储阵列。 控制电路是用于识别和控制插入到扩展插座中的不同种类的存储卡的仿真器。

公开(公告)号：KR1020040001739A

公开(公告)日：2004-01-07

申请号：KR1020020037058

申请日：2002-06-28

Applicant: 삼성전자주식회사

Inventor： 김일기 ,  홍성재 ,  김평완

IPC: H01L23/28

CPC classification number: H01L2224/48091 ,  H01L2224/4826 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: PURPOSE: A dual die package is provided to be capable of reducing the thickness of the dual die package by improving the structure of the package. CONSTITUTION: A dual die package(50) is provided with the first semiconductor chip(51) having a bonding pad, the second semiconductor chip(53) having a bonding pad, located at the lower portion of the first semiconductor chip, leads(61,63) located at the lateral portion of the first and second semiconductor chip, and a tape(55b) having a conductive pattern for connecting one out of the first and second semiconductor chip with the lead. The dual die package further includes a plurality of wires(64a,64b,65a,65b) for connecting the bonding pad with the tape, the tape with the lead, or the bonding pad with the lead, and a package body part(68) for selectively encapsulating the resultant structure.

Abstract translation: 目的：提供双管芯封装，以便通过改进封装的结构来减小双管芯封装的厚度。 构成：双管芯封装（50）设置有具有接合焊盘的第一半导体芯片（51），第二半导体芯片（53）具有接合焊盘，位于第一半导体芯片的下部，引线（61 ，63）和具有用于将所述第一和第二半导体芯片中的一个与所述引线连接的导电图案的带（55b）。 双模组件还包括多个用于将焊盘与带连接的导线（64a，64b，65a，65b），带引线的带或与引线的焊盘，以及封装主体部分（68） 用于选择性地封装所得结构。

公开(公告)号：KR1020030048247A

公开(公告)日：2003-06-19

申请号：KR1020010078134

申请日：2001-12-11

Applicant: 삼성전자주식회사

Inventor： 김일기 ,  홍성재

IPC: H01L23/48

CPC classification number: H01L2224/05553 ,  H01L2224/32225 ,  H01L2224/48 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: PURPOSE: A center pad type BGA(Ball Grid Array) package including a metal pattern formed chip is provided to be capable of preventing the generation of long loop bonding wire and relatively simplifying manufacturing processes by forming a metal pattern on a chip. CONSTITUTION: A chip pad(33) is formed on a chip(31). A plurality of metal patterns(40) are formed at both sides of the chip pad(33) on the chip(31), respectively. The chip is attached on the inactive surface of a substrate(32) using an adhesive(37), wherein the substrate(32) includes a substrate pad(39) formed on the upper portion and a plurality of solder pads(38) formed on the lower portion of the substrate. The first bonding wire(341) is electrically connected between the chip pad and metal patterns. The second bonding wire(342) is electrically connected between the metal patterns and substrate pad. A plurality of solder balls(35) are attached on the substrate through the solder pads. An EMC(Epoxy Molding Compound)(36) is formed on the upper portion of the resultant structure for enclosing the chip, the first and second bonding wire.

Abstract translation: 目的：提供一种包括金属图案形成的芯片的中心焊盘BGA（球栅阵列）封装，以能够防止长环焊接线的产生，并通过在芯片上形成金属图案相对简化制造工艺。 构成：在芯片（31）上形成芯片焊盘（33）。 在芯片（31）上的芯片焊盘（33）的两侧分别形成有多个金属图案（40）。 使用粘合剂（37）将芯片附着在基板（32）的非活性表面上，其中基板（32）包括形成在上部的基板焊盘（39）和形成在上部上的多个焊盘（38） 衬底的下部。 第一接合线（341）电连接在芯片焊盘和金属图案之间。 第二接合线（342）电连接在金属图案和衬底衬垫之间。 通过焊盘将多个焊球（35）附着在基板上。 在所得结构的上部形成有EMC（环氧树脂成形体）（36），用于封装芯片，第一和第二接合线。

公开(公告)号：KR1020070017797A

公开(公告)日：2007-02-13

申请号：KR1020050072390

申请日：2005-08-08

Applicant: 삼성전자주식회사

Inventor： 김일기 ,  황태회

IPC: H01L23/28 ,  H01L23/12

CPC classification number: G06K19/0772 ,  H01L23/043

Abstract: 본 발명은 칩 카드에 관한 것으로서, 하부면에 반도체 패키지의 수납 영역을 따라 돌출되어 형성된 걸림 고리를 갖는 베이스 카드와, 걸림 고리와 대응되도록 가장자리 부분에 삽입 홈이 형성된 인쇄 회로 기판을 갖는 반도체 패키지를 포함하며, 걸림 고리가 삽입 홈을 지지하며 반도체 패키지와 베이스 카드가 물리적으로 결합되는 칩 카드를 제공한다.
따라서, 외부 환경이나 장기간의 사용에 의하여 반도체 패키지와 베이스 카드가 서로 박리되는 것을 방지할 수 있다.
MMC, 메모리 카드, 베이스 카드, COB, 반도체