Abstract:
비휘발성메모리장치에프로그램된데이터를독출하기위하여, 멀티-레벨셀들에대하여제1 독출동작을수행하고, 멀티-레벨셀들에상응하는적어도하나의플래그셀에대하여제1 센싱을수행하고, 제1 센싱의결과를기초로멀티-레벨셀들에대하여제2 독출동작을선택적으로수행하고, 제2 독출동작이수행되는경우에적어도하나의플래그셀에대하여제2 센싱을수행하며, 제1 독출동작의결과, 제1 센싱의결과, 제2 독출동작의결과및 제2 센싱의결과에기초하여멀티-레벨셀들에프로그램된데이터에상응하는독출데이터를출력한다.
Abstract:
PURPOSE: A flash memory device and a method for generating a word line voltage thereof are provided to efficiently read and verify data distributed in a negative voltage domain by converting a negative word line voltage level at high speed. CONSTITUTION: It is discriminated whether a negative voltage is continuously generated(S1000). It is determined whether a negative charge pumping result is equal to or lower than a target negative voltage(S1100). If the negative voltage is not continuously generated, a negative charge is pumped. If the target negative voltage is higher than a prior target negative voltage, the output of a negative voltage generator is discharged(S1200). The target negative voltage is generated by pumping the negative charge if the discharge result is higher than the target negative voltage(S1300).
Abstract:
A flash memory device for minimizing fluctuation of a read voltage in a state of an RWW(Read While Write) operation and a method thereof are provided to minimize the fluctuation of the read voltage according to an RWW function irrespective of a size of a NOR flash memory array. A semiconductor memory device(400) includes a read voltage generator(442), a write voltage generator(444), and a plurality of switches(SW1a,SW2a,SW3a,SW4a). The read voltage generator generates read voltages used for read operations from banks(BANK1,BANK2,BANK3,BANK4). The write voltage generator generates write voltages used for write operations with respect to the banks. The switches are used for switching the voltages applied to the banks to the write voltages or the read voltages in response to control signals(XSC1,XSC2,XSC3,XSC4).
Abstract:
불휘발성 반도체 메모리 장치의 프로그램 비트 스캔표시회로가 게시된다. 본 발명의 프로그램 비트 스캔표시회로는 카운팅부, 설정비트수 제공부 및 비교부를 구비한다. 상기 카운팅부는 소정의 프로그램 필요 비트수를 카운팅하며, 상기 프로그램 필요 비트수를 나타내는 카운팅비트신호군을 제공한다. 상기 설정비트수 제공부는 상기 설정비트수를 나타내는 설정비트신호군을 제공한다. 상기 설정비트수은 외부에서 제어할 수 있다. 상기 비교부는 상기 카운팅비트신호군을 상기 설정비트신호군과 비교하여, 궁극적으로 상기 메모리어레이에 대한 프로그램을 제어하는 스캔종료신호를 제공한다. 상기 스캔종료신호는 상기 프로그램 필요 비트수가 상기 설정비트수에 도달함에 응답하여 천이한다. 본 발명의 프로그램 비트 스캔표시회로에 의하면, 설계자 또는 이용자가 동시에 프로그램할 비트수를 조절할 수 있게 되며, 전체적으로 프로그램 시간이 현저히 단축될 수 있다. 프로그램, 불휘발성, 메모리, 설정비트
Abstract:
PURPOSE: A method for reading data in a nonvolatile memory device and a driving method thereof are provided to improve operation performance by efficiently reading data programmed in multilevel cells. CONSTITUTION: A first reading operation is performed in a plurality of multilevel cells(S100). A first sensing operation is performed in one flag cell corresponding to the plurality of multilevel cells(S200). A second reading operation is selectively performed in the plurality of multilevel cells based on the result of the first sensing operation(S300). A second sensing operation is performed in the flag cell when the second reading operation is performed(S400). Read data corresponding to the data programmed in the plurality of multilevel cells are outputted based on the results of the first reading operation, the first sensing operation, and the second reading operation, and the second sensing operation(S500). [Reference numerals] (AA) Start; (BB) End; (S100) Perform a first reading operation for multilevel cells; (S200) Perform a first sensing operation for a flag cell corresponding to the multilevel cells; (S300) Selectively perform a second reading operation for the multilevel cells based on the result of the first sensing operation; (S400) Perform a second sensing operation for the flag cell when the second reading operation is performed; (S500) Output reading data based on the results of the first reading operation, the first sensing operation, the second reading operation, and the second sensing operation
Abstract:
A NOR flash memory device having a multi-level cell and a read method thereof are provided to solve instability of the sensing operation due to the increase of a source line voltage, and to reduce unnecessary current consumption. A memory cell(MC1~MC4) is connected to a bit line, and is turned on or off according to the voltage level of a word line. A precharge circuit(211) charges the bit line. A discharge circuit(212) discharges the bit line. A data latch circuit(213) controls the discharge circuit to discharge the bit line through the discharge circuit, if it is determined that the memory cell is an on-cell as the result of a read operation according to the voltage level of the word line.
Abstract:
여기에 개시된 불휘발성 메모리 장치 및 방법은, 데이터를 스캐닝하여 실제 프로그램될 데이터 비트를 찾아내고, 이를 소정의 개수 만큼씩 동시에 프로그램 한다. 특히, 본 발명에서는 상기 데이터 스캐닝 과정과 상기 프로그램 과정을 파이프라인 방식으로 수행하기 때문에, 데이터를 프로그램 하는데 걸리는 평균 시간이 효과적으로 단축된다.