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公开(公告)号：KR1020080070355A
公开(公告)日：2008-07-30
申请号：KR1020070008338
申请日：2007-01-26
Applicant: 삼성전자주식회사
IPC: G02F1/136 , G02F1/1368
CPC classification number: G02F1/1368 , G02F1/13624 , G02F1/136286 , G02F2201/123 , H01L27/124
Abstract: A TFT(Thin Film Transistor) substrate is provided to allow charges to get out of two sub-pixel electrodes within a pixel promptly by forming thin film transistors for the two sub-pixel electrodes respectively and differentiate voltage applied to the sub-pixel electrodes by varying channel length and channel width of TFT, thereby preventing afterimage from being generated. First and second gate lines(121n,121p) are formed on a substrate. First and second TFTs are connected to the first gate line. A third TFT is connected to the second gate line. A data line is connected to the first TFT. A pixel electrode includes a first sub-pixel electrode(191b1) electrically connected to the first and third TFTs and a second sub-pixel electrode(191b2) electrically connected to the second and third TFTs. A channel length and a channel width of the first TFT are different from a channel length and a channel width of the second TFT.
Abstract translation: 提供TFT（薄膜晶体管）基板，以通过分别形成用于两个子像素电极的薄膜晶体管，并通过分别施加到子像素电极的电压来区分施加到子像素电极的电压，从而迅速地从像素内的两个子像素电极中脱出 改变TFT的通道长度和通道宽度，从而防止产生残留图像。 第一和第二栅极线（121n，121p）形成在基板上。 第一和第二TFT连接到第一栅极线。 第三TFT连接到第二栅极线。 数据线连接到第一TFT。 像素电极包括电连接到第一和第三TFT的第一子像素电极（191b1）和与第二和第三TFT电连接的第二子像素电极（191b2）。 第一TFT的沟道长度和沟道宽度不同于第二TFT的沟道长度和沟道宽度。
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公开(公告)号：KR1020080050704A
公开(公告)日：2008-06-10
申请号：KR1020060121268
申请日：2006-12-04
Applicant: 삼성전자주식회사
IPC: G02F1/136
CPC classification number: G02F1/136286 , G02F1/1343 , G02F1/1368 , G02F2201/123 , H01L27/1214
Abstract: An array substrate and a display panel having the array substrate are provided to prevent the area of an overlapped region of a lower electrode and a storage line from varying even though the lower electrode is mis-aligned with respect to the storage line to restrain a variation in down voltage capacitance. An array substrate includes a gate line(GL), a data line(DL), a pixel electrode(140), a storage line(SL), a dual transistor(DTFT), a connecting transistor(CTFT), a lower electrode(150), and an upper electrode(160). The gate line is formed in a first direction and includes first and second gate lines(GL1,GL2) adjacent to each other. The data line is formed in a second direction perpendicular to the first direction. The pixel electrode is formed in a unit pixel defined by the gate line and the data line and includes a first pixel(142) and a second pixel(144) surrounding the first pixel. The storage line is formed at the same level at which the gate line is formed and superposed on the first and second pixels. The dual transistor is connected to the first gate line and the data line and includes a first drain electrode(DE1) connected to the first pixel and a second drain electrode(DE2) connected to the second pixel. The connecting transistor is connected to the second gate line and the first pixel.
Abstract translation: 设置阵列基板和具有阵列基板的显示面板，以防止下部电极和存储线的重叠区域的面积变化，即使下部电极相对于存储线不对准以抑制变化 在降压电容。 阵列基板包括栅线（GL），数据线（DL），像素电极（140），存储线（SL），双晶体管（DTFT），连接晶体管（CTFT），下电极 150）和上电极（160）。 栅极线形成在第一方向上并且包括彼此相邻的第一和第二栅极线（GL1，GL2）。 数据线形成在垂直于第一方向的第二方向上。 像素电极形成在由栅极线和数据线限定的单位像素中，并且包括围绕第一像素的第一像素（142）和第二像素（144）。 存储线形成在与栅极线形成并叠置在第一和第二像素上的相同电平上。 双晶体管连接到第一栅极线和数据线，并且包括连接到第一像素的第一漏电极（DE1）和连接到第二像素的第二漏电极（DE2）。 连接晶体管连接到第二栅极线和第一像素。
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公开(公告)号：KR1020080010837A
公开(公告)日：2008-01-31
申请号：KR1020060071426
申请日：2006-07-28
Applicant: 삼성전자주식회사
IPC: G02F1/133
CPC classification number: G09G3/006 , G09G3/3614 , G09G3/3648
Abstract: A module and a method for detecting a defect of a thin film transistor substrate are provided to separate gate lines into two parts and drive stage parts formed at both sides of the gate lines to detect gate line disconnection, and supply a negative voltage level signal to data lines to improve the capability of detecting gate line disconnection. A data signal generator(1100) supplies data signals for a test to a plurality of data lines(D1-D2m) of a thin film transistor substrate(100). An operation signal generator(1200) is formed on the thin film transistor substrate for supplying operation signals to first and second gate driving units(201,202) formed at both side areas of a plurality of gate lines. An inspecting unit(1300) measures a voltage level of pixel electrodes on the thin film transistor substrate.
Abstract translation: 提供了用于检测薄膜晶体管基板的缺陷的模块和方法，以将栅极线分成两部分，并且形成在栅极线的两侧的驱动级部分以检测栅极线断开，并将负电压电平信号提供给 数据线，以提高检测门极线断开的能力。 数据信号发生器（1100）将用于测试的数据信号提供给薄膜晶体管基板（100）的多个数据线（D1-D2m）。 操作信号发生器（1200）形成在薄膜晶体管基板上，用于向形成在多个栅极线的两个侧面区域的第一和第二栅极驱动单元（201,202）提供操作信号。 检查单元（1300）测量薄膜晶体管基板上的像素电极的电压电平。
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公开(公告)号：KR100623979B1
公开(公告)日：2006-09-13
申请号：KR1019990030631
申请日：1999-07-27
Applicant: 삼성전자주식회사
IPC: G02F1/136
Abstract: 기판 위에 알루미늄 계열의 금속으로 게이트선, 게이트 전극 및 게이트 패드를 포함하는 게이트 배선을 형성한다. 이어, 게이트 배선을 덮는 게이트 절연막의 게이트 전극 상부에 반도체층을 형성하고, 게이트선과 교차하는 데이터선, 데이터선의 분지인 소스 전극, 게이트 전극을 중심으로 소스 전극과 마주하는 드레인 전극 및 데이터 패드를 포함하는 데이터 배선을 형성한다. 다음, 보호막을 적층하고 게이트 절연막을 함께 패터닝하여 드레인 전극, 게이트 패드 및 데이터 패드를 각각 드러내는 제1 내지 제3 접촉 구멍을 형성한다. 이어, 보호막의 상부에 IZO막을 적층하고 패터닝하여 제1 접촉 구멍을 통하여 드레인 전극과 연결되는 화소 전극, 제3 접촉 구멍을 통하여 데이터 패드와 연결되는 보조 데이터 패드 및 제3 접촉 구멍을 통하여 게이트 패드와 연결되며 게이트 패드를 드러내는 제1 개구부를 가지는 보조 게이트 패드를 포함하는 도전막 패턴을 형성한다.
배터리 효과, 알루미늄, IZO, 쇼팅 바, 정전기, 어레이 검사, 화소 불량Abstract translation: 包括栅极线，栅极电极和栅极焊盘的栅极布线形成在具有铝基金属的基板上。 然后，和覆盖所述栅极线形成的半导体层的栅极绝缘膜之上的栅极电极，包括数据线，源电极的数据线分支，面对栅电极电极周围横跨栅极线和所述源极电极和数据焊盘的漏极 从而形成数据布线。 接下来，层压保护膜并且将栅极绝缘膜一起图案化以形成分别用于暴露漏电极，栅极焊盘和数据焊盘的第一至第三接触孔。 然后，通过过像素电极的第一步伐栅极焊盘，通过连接到连接到所述数据焊盘漏电极，数据焊盘，并且通过IZO第三接触孔的第一接触孔，第三接触孔的层压薄膜上的保护层和图案化的顶 以及连接到栅极焊盘并具有第一开口以暴露栅极焊盘的辅助栅极焊盘。
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公开(公告)号：KR1020060070196A
公开(公告)日：2006-06-23
申请号：KR1020040108854
申请日：2004-12-20
Applicant: 삼성전자주식회사
IPC: G02F1/133
CPC classification number: G09G3/006 , G09G3/3677
Abstract: 검사 효율성을 향상시킬 수 있는 어레이 기판 및 이를 갖는 표시장치가 개시된다. 화소부는 다수의 게이트 라인, 다수의 데이터 라인 및 다수의 게이트 라인과 다수의 데이터 라인에 전기적으로 연결된 다수의 화소로 이루어진다. 구동회로는 기판 상에 구비되고, 다수의 게이트 라인의 제1 단부에 전기적으로 연결된 화소부를 구동시킨다. 검사회로는 다수의 게이트 라인의 제2 단부와 전기적으로 연결되고, 외부로부터 제공되는 검사신호에 응답하여 화소부를 검사한다. 따라서, 어레이 기판의 검사 효율성을 향상시킬 수 있다.
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Patent Agency Ranking
公开(公告)号：KR1020040033353A
公开(公告)日：2004-04-28
申请号：KR1020020062408
申请日：2002-10-14
Applicant: 삼성전자주식회사
IPC: G02F1/136
CPC classification number: G02F1/136286 , G02F1/136227 , G02F1/1368 , G02F2001/13625 , G02F2001/136295 , G02F2201/123
Abstract: PURPOSE: A thin film transistor substrate and a method for manufacturing the same are provided to reduce resistance of wiring by using aluminum and prevent an undercut structure by not forming an aluminum layer where contact holes are formed. CONSTITUTION: Data wiring includes source electrodes, drain electrodes, data lines(171), and data pads(179) formed on an ohmic contact layer(161) in the same plane pattern as the ohmic contact layer. The data wiring is formed of double layers of a chrome pattern(711) and an aluminum pattern(712) except the data pads and the drain electrodes. The drain electrodes and an electrode(177) for maintenance capacity contacting with pixel electrodes are formed of a chrome mono layer each, and the data pads contacting with auxiliary pads are formed of a chrome mono layer.
Abstract translation: 目的：提供一种薄膜晶体管基板及其制造方法，通过不形成形成有接触孔的铝层，通过使用铝来降低布线阻力，防止底切结构。 构成：数据布线包括形成在与欧姆接触层相同的平面图案的欧姆接触层（161）上的源电极，漏电极，数据线（171）和数据焊盘（179）。 数据布线由除了数据焊盘和漏电极之外的铬图案（711）和铝图案（712）的双层形成。 用于与像素电极接触的维持能力的漏电极和电极（177）由铬单层形成，并且与辅助焊盘接触的数据焊盘由铬单层形成。
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公开(公告)号：KR1020040024916A
公开(公告)日：2004-03-24
申请号：KR1020020056649
申请日：2002-09-17
Applicant: 삼성전자주식회사
IPC: G02F1/133
CPC classification number: G02F1/133 , G09G1/146 , G09G3/3655 , G09G3/3696
Abstract: PURPOSE: A liquid crystal display is provided to improve display characteristics. CONSTITUTION: The first substrate(100) comprises an electrode area comprising the first and the second electrode area(A,B) where a common electrode is formed, and an insulation area(C) insulating the first and the second electrode area. The second substrate has a pixel electrode facing the common electrode, and comprises an effective display area and a non-effective display area corresponding to the insulation area. And a liquid crystal layer is intervened between the first substrate and the second substrate. The first voltage is applied to the first electrode area, and the second voltage is applied to the second electrode area.
Abstract translation: 目的：提供液晶显示器以改善显示特性。 构成：第一基板（100）包括包括形成公共电极的第一和第二电极区域（A，B）的电极区域和绝缘区域（C），绝缘区域（C）绝缘第一和第二电极区域。 第二基板具有面向公共电极的像素电极，并且包括对应于绝缘区域的有效显示区域和非有效显示区域。 并且液晶层介于第一基板和第二基板之间。 将第一电压施加到第一电极区域，并且将第二电压施加到第二电极区域。
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公开(公告)号：KR1020040006998A
公开(公告)日：2004-01-24
申请号：KR1020020041624
申请日：2002-07-16
Applicant: 삼성전자주식회사
IPC: G02F1/1335
CPC classification number: G02F1/133514 , G02F1/133512 , G02F1/133516 , G02F1/13394 , G02F1/136209 , G02F2001/136222
Abstract: PURPOSE: A liquid crystal display and a method for manufacturing a color filter substrate used therefor are provided to realize equal spacers by breaking down protrusion parts different in size in bonding a liquid crystal display, thereby preventing light loss. CONSTITUTION: Black matrices(220) are formed on an insulating substrate(210). Red, green, and blue color filters are formed on the black matrices. A reference electrode(270) is formed on the color filters. A photoresist layer for forming spacers are formed on the reference electrode. An optical mask having mask patterns including slits is arranged on the photoresist layer. Spacers(320) having protrusion parts at one ends are formed by exposing and developing the photoresist layer.
Abstract translation: 目的：提供一种液晶显示器及其制造方法，用于通过在液晶显示器的接合中分解尺寸不同的突起部分来实现等间隔件，从而防止光损失。 构成：黑色矩阵（220）形成在绝缘衬底（210）上。 红色，绿色和蓝色滤色片形成在黑色矩阵上。 参考电极（270）形成在滤色器上。 在参考电极上形成用于形成间隔物的光致抗蚀剂层。 具有包括狭缝的掩模图案的光掩模布置在光致抗蚀剂层上。 通过曝光和显影光致抗蚀剂层来形成在一端具有突出部分的间隔物（320）。
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公开(公告)号：KR1020040005256A
公开(公告)日：2004-01-16
申请号：KR1020020039746
申请日：2002-07-09
Applicant: 삼성전자주식회사
IPC: H01L29/786
Abstract: PURPOSE: A TFT substrate is provided to maintain constantly the parasitic capacitance due to an alignment error by forming additionally a compensative pattern connected to a gate line. CONSTITUTION: A TFT substrate includes a gate wiring, a gate insulating layer, a semiconductor layer, a data wiring, a protective layer, and a pixel electrode. The gate wiring is formed with a gate line(121), a gate electrode(123), a gate pad, and a compensative pattern(122). The gate insulating layer is formed on the gate wiring. The semiconductor layer is formed on a predetermined region of the gate insulating layer. The data wiring is formed with a data line(171), a source electrode(173), a drain electrode(175), and a data pad. The protective layer includes a contact hole and is formed on the data wiring. The pixel electrode is formed on the protective layer in order to be connected to the drain electrode(175) through the contact hole.
Abstract translation: 目的：提供TFT基板，通过形成连接到栅极线的补偿图案来恒定地维持由于取向误差引起的寄生电容。 构成：TFT基板包括栅极布线，栅极绝缘层，半导体层，数据布线，保护层和像素电极。 栅极布线形成有栅极线（121），栅极电极（123），栅极焊盘和补偿图案（122）。 栅极绝缘层形成在栅极布线上。 半导体层形成在栅极绝缘层的预定区域上。 数据线由数据线（171），源电极（173），漏电极（175）和数据焊盘构成。 保护层包括接触孔，并形成在数据布线上。 像素电极形成在保护层上，以便通过接触孔与漏电极（175）连接。
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10.发明授权질화 몰리브덴-금속 합금막과 그의 제조 방법, 액정표시장치용 배선과 그의 제조 방법 및 액정 표시 장치와 그의 제조방법 失效氮化钼 - 金属合金膜及其制造方法，液晶显示装置用布线及其制造方法，液晶显示装置及其制造方法
公开(公告)号：KR100338008B1
公开(公告)日：2002-10-25
申请号：KR1019970061315
申请日：1997-11-20
Applicant: 삼성전자주식회사
IPC: G02F1/1343
Abstract: PURPOSE: A method for fabricating a liquid crystal display device is provided to increase the chemical resistance of data lines with respect to an ITO etching solution for pixel electrodes, thereby preventing the short of the data lines. CONSTITUTION: A method for fabricating a liquid crystal display device includes a transparent insulating substrate, gate wires formed on the substrate, a gate insulating film(300) covering the gate wires, data wires(510,520) formed on the gate insulating film with molybdenum or molybdenum alloy, auxiliary data lines(550) formed on or under the data wires with molybdenum nitride or molybdenum nitride alloy, a protecting film(600) positioned on the data wires and the auxiliary data lines, and pixel electrodes(700) formed on the protecting film.
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