公开(公告)号：KR1020130113002A

公开(公告)日：2013-10-15

申请号：KR1020120035204

申请日：2012-04-05

Applicant: 성균관대학교산학협력단

Inventor： 이준신 ,  박철민 ,  송규완 ,  김봉기 ,  유경열 ,  최재우

IPC: H01L31/042 ,  H01L31/18

CPC classification number: Y02E10/50 ,  Y02P70/521 ,  H01L31/042 ,  H01L31/18

Abstract: PURPOSE: A method for forming a selective emitter layer using an etchant protecting layer is provided to prevent the selective emitter layer from being damaged by performing a wet-etching process. CONSTITUTION: A first conductive substrate is prepared (S10). A second conductive emitter layer is formed on the upper surface of the first conductive substrate (S20). An etchant protecting layer is patterned and deposited on the second conductive emitter layer (S30). The second conductive emitter layer is selectively wet-etched (S40). The etchant protecting layer is removed from the surface of the first conductive substrate (S50). [Reference numerals] (S10) Step where a first conductive substrate is prepared; (S20) Step where a second conductive emitter layer is formed on the upper surface of the first conductive substrate using an impurity with an opposite type of the first conductive substrate through an ion injection & diffusion process; (S30) Step where an etchant protecting layer is patterned and deposited on the second conductive emitter layer; (S40) Step where the second conductive emitter layer is selectively wet-etched with a wet etchant; (S50) Step where the etchant protecting layer is removed; (S60) Step where an anti-reflection layer is formed on the surface of the substrate; (S70) Step where electrodes are formed on the highly-doped emitter layer and the back of the substrate

Abstract translation: 目的：提供一种使用蚀刻剂保护层形成选择性发射极层的方法，以防止通过执行湿蚀刻工艺来损害选择性发射极层。 构成：准备第一导电性基板（S10）。 在第一导电基板的上表面上形成第二导电发射极层（S20）。 蚀刻剂保护层被图案化并沉积在第二导电发射极层上（S30）。 第二导电发射极层被选择性地湿式蚀刻（S40）。 蚀刻剂保护层从第一导电基板的表面去除（S50）。 （附图标记）（S10）准备第一导电性基板的工序; （S20）通过离子注入和扩散处理使用具有相反类型的第一导电衬底的杂质在第一导电衬底的上表面上形成第二导电发射极层的步骤; （S30）将蚀刻剂保护层图案化并沉积在第二导电发射极层上的步骤; （S40）第二导电发射极层用湿蚀刻剂选择性湿蚀刻的步骤; （S50）去除蚀刻剂保护层的步骤; （S60）在基板的表面上形成防反射层的步骤; （S70）在高掺杂发射极层和衬底的背面上形成电极的步骤