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公开(公告)号：KR1020140019984A
公开(公告)日：2014-02-18
申请号：KR1020120086230
申请日：2012-08-07
Applicant: 한국전자통신연구원
IPC: H01L31/107
CPC classification number: H01L31/18 , H01L31/02002 , H01L31/035272 , H01L31/107
Abstract: The present invention relates to an avalanche photodiode having a guard ring structure for reducing edge-breakdown thanks to an external voltage applied through a metal pad attached on the guard ring and a manufacturing method thereof. The avalanche photodiode having a guard ring structure includes: a plurality of semiconductor layers which are stacked on a substrate; an active area which is formed on part of the top of the semiconductor layers; a guard ring which is formed on the top of the semiconductor layers, is separated from the active area, and has a ring shape surrounding the active area; and a connection unit which is formed on the top of the semiconductor layers and is connected to the guard ring to apply an external voltage onto the guard ring. Therefore, the external voltage is applied onto the guard ring of the avalanche diode through the connection unit so that edge-breakdown can be reduced.
Abstract translation: 本发明涉及一种具有保护环结构的雪崩光电二极管及其制造方法，该保护环结构用于通过附着在防护环上的金属焊盘施加的外部电压来减少边缘击穿。 具有保护环结构的雪崩光电二极管包括：层叠在基板上的多个半导体层; 形成在半导体层顶部的一部分上的有源区; 形成在半导体层顶部的保护环与有源区分离，并且具有围绕有源区的环形形状; 以及连接单元，其形成在所述半导体层的顶部并连接到所述保护环，以将外部电压施加到所述保护环上。 因此，通过连接单元将外部电压施加到雪崩二极管的保护环上，从而可以减少边缘击穿。
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公开(公告)号：KR1020130139162A
公开(公告)日：2013-12-20
申请号：KR1020130051216
申请日：2013-05-07
Applicant: 한국전자통신연구원
Abstract: Provided is a focal plane array (FPA) module capable of improving the quality of an obtained three-dimensional image by adjusting the interval and size of an array of optical detectors in the FPA module for obtaining a three-dimensional image. The FPA module for obtaining a three-dimensional image according to an embodiment of the present invention comprises multiple optical detectors which detect light reflected from a monitored object, wherein the multiple optical detectors are arranged at different intervals according to the location of the optical detectors.
Abstract translation: 提供了一种焦平面阵列（FPA）模块，其能够通过调整FPA模块中的光学检测器阵列的间隔和尺寸来获得三维图像来提高所获得的三维图像的质量。 根据本发明实施例的用于获得三维图像的FPA模块包括检测从被监视对象反射的光的多个光学检测器，其中根据光学检测器的位置以不同的间隔布置多个光学检测器。
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公开(公告)号：KR101263310B1
公开(公告)日：2013-05-13
申请号：KR1020090026352
申请日：2009-03-27
Applicant: 한국전자통신연구원
IPC: H01L31/09 , H01L29/737
CPC classification number: Y02E10/50
Abstract: 광수신기및 그형성방법이제공된다. 광수신기는기판후면에집적된렌즈, 기판전면상의광검출기및 기판전면상의이종접합바이폴라트랜지스터를포함하되, 렌즈는입사되는광신호를집광하여광검출기에전송한다.
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公开(公告)号：KR101211085B1
公开(公告)日：2012-12-12
申请号：KR1020090043174
申请日：2009-05-18
Applicant: 한국전자통신연구원
IPC: H01L27/146
Abstract: 본발명에다른고유포토다이오드이미지센서는포토다이오드, 상기포토다이오드로부터의전자를집속하는확산영역, 상기포토다이오드와상기확산영역을연결하는트랜스퍼트랜지스터및 상기확산영역으로부터신호를득출하는득출회로를포함하는적어도 2개이상의단위화소를포함하는이미지센서에있어서, 이웃한상기단위화소는상기포토다이오드가서로이웃하도록대칭적으로배치되어하나의공유포토다이오드를형성한다. 따라서, 공유포토다이오드이미지센서는성능에제한을주는암전류를발생하는소자분리막를제거할뿐만아니라, 소자분리막과관련된기본적인최소설계요구조건(간격, 면적)을제거하여, 이러한영역을포토다이오드로사용할수 있거나, 추가적인화소스케일링에이용할수 있도록함으로써포토다이오드자체의스케일링한계를획기적으로개선하고, 화소의스케일링에도픽셀성능을유지할수 있도록한다.
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Patent Agency Ranking
公开(公告)号：KR1020120069127A
公开(公告)日：2012-06-28
申请号：KR1020100130537
申请日：2010-12-20
Applicant: 한국전자통신연구원
IPC: H01L31/107 , H01L31/18 , H01L31/02
CPC classification number: H01L31/107 , H01L31/184 , Y02E10/544 , H01L31/02027 , H01L2924/12043
Abstract: PURPOSE: A method for manufacturing an avalanche photo diode is provided to improve process efficiency by forming a guard ring area and a junction area through one diffusion process. CONSTITUTION: An epitaxy wafer is formed on the front of a substrate. A protection layer for protecting a diffusion control layer is formed on a diffusion control layer(106). An etching unit(108) is formed by etching an amplification layer(105) with a preset depth from the protection layer. A first patterning unit is formed by patterning the protection layer. A junction area and a guard ring area are formed on the amplification layer by diffusing diffusion materials on the etching unit and the first patterning unit. The diffusion control layer and the protection layer are removed. A first electrode connected to the junction area is formed on the amplification layer. A second electrode is formed on the rear of the substrate.
Abstract translation: 目的：提供一种制造雪崩光电二极管的方法，通过一个扩散过程形成保护环面积和结面积来提高工艺效率。 构成：在基板的前部形成外延晶片。 用于保护扩散控制层的保护层形成在扩散控制层（106）上。 通过从保护层蚀刻具有预定深度的放大层（105）形成蚀刻单元（108）。 通过图案化保护层形成第一图案形成单元。 在扩散层上通过在扩散材料上扩散蚀刻单元和第一图案形成单元形成接合区域和保护环区域。 去除扩散控制层和保护层。 连接到结区的第一电极形成在放大层上。 第二电极形成在基板的后部。
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公开(公告)号：KR1020110065285A
公开(公告)日：2011-06-15
申请号：KR1020100073374
申请日：2010-07-29
Applicant: 한국전자통신연구원
IPC: G01J1/44 , H01L27/146
CPC classification number: G11C27/024
Abstract: PURPOSE: A optical detector including the coupling capacitor is provided to control the movement characteristic deviation of each detectors easily by using the coupling capacitor and operating each avalanche photo diode with different bias voltage. CONSTITUTION: The optical detector(100) having a coupling capacitor includes: an avalanche photodiode(APD); a bias circuit(110); a detection circuit(120); and a coupling capacitor(Cc). The bias circuit offers the bias voltage(Vb) to one end of the avalanche photo diode. The detection circuit is connected to the other end of the avalanche photo diode and detects the photo current generated in the avalanche photo diode. The coupling capacitor is first of all connected to the fist or the other end of avalanche photo diode. The coupling voltage for driving the avalanche photo diode to the Geiger mode is offered. The coupling capacitor is formed into the fixed type. The size of the coupling voltage is varied according to the size of the overdrive voltage(Vod) offered to the coupling capacitor. The bias voltage is lower than the break down voltage of the avalanche photo diode.
Abstract translation: 目的：提供一个包括耦合电容的光学检测器，通过使用耦合电容器和操作具有不同偏置电压的每个雪崩光电二极管，轻松控制每个探测器的运动特性偏差。 构成：具有耦合电容器的光检测器（100）包括：雪崩光电二极管（APD）; 偏置电路（110）; 检测电路（120）; 和耦合电容器（Cc）。 偏置电路为雪崩光电二极管的一端提供偏置电压（Vb）。 检测电路连接到雪崩光电二极管的另一端，并检测在雪崩光电二极管中产生的光电流。 耦合电容器首先连接到雪崩光电二极管的第一端或另一端。 提供了将雪崩光电二极管驱动到盖革模式的耦合电压。 耦合电容器形成固定型。 耦合电压的大小根据提供给耦合电容器的过驱动电压（Vod）的大小而变化。 偏置电压低于雪崩光电二极管的击穿电压。
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公开(公告)号：KR1020160126154A
公开(公告)日：2016-11-02
申请号：KR1020150056657
申请日：2015-04-22
Applicant: 한국전자통신연구원
Abstract: 본발명은레이저레이더시스템에관한것으로, 비회전하는고해상도광각의 3차원영상검출을위한아발란치광 검출기어레이를이용하는레이저레이더시스템에관한것이다. 이에따른본 발명은, 펄스레이저로부터출력되는광을편향시켜목표물의원하는영역에조사되도록하는광 편향기, 상기목표물로부터반사되고수광렌즈를거쳐전달되는광을수신하고, 수신한광으로부터신호를검출하는아발란치광 검출기, 상기아발란치광 검출기에의해검출된신호를증폭시키는증폭기, 상기증폭기에의해증폭된신호를통합하는결합기및 상기결합기에의해통합된신호를처리하여 3차원영상으로출력하는영상처리기를포함하되, 상기아발란치광 검출기는특정한형태로배열된복수의아발란치광 다이오드를포함하는것을특징으로하는레이저레이더시스템에관한것이다. 특히, 본발명은타겟에서반사되어오는신호를수광렌즈를통하여수신되는광을인포커싱하여수신함에있어서, 광각의고해상도영상을얻기위해각각의아발란치광 검출기어레이의간격을최적화하는레이저레이더시스템에관한것이다.
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公开(公告)号：KR101344027B1
公开(公告)日：2013-12-24
申请号：KR1020100073374
申请日：2010-07-29
Applicant: 한국전자통신연구원
IPC: G01J1/44 , H01L27/146
CPC classification number: G11C27/024
Abstract: 본발명은가이거모드로동작하는광검출기에관한것이다. 본발명의실시예에따른광검출기는, 아발란치포토다이오드, 상기아발란치포토다이오드의일단에바이어스전압을제공하는바이어스회로, 상기아발란치포토다이오드의타단에연결되며, 상기아발란치포토다이오드에발생하는광전류를검출하기위한검출회로, 그리고상기아발란치포토다이오드의일단또는타단에연결되며, 상기아발란치포토다이오드를가이거모드로구동하기위한커플링전압을제공하는커플링커패시터를포함한다.
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公开(公告)号：KR1020100071693A
公开(公告)日：2010-06-29
申请号：KR1020080130496
申请日：2008-12-19
Applicant: 한국전자통신연구원
IPC: H01L31/107
CPC classification number: H01L31/107 , H01L31/02366 , H01L31/0392 , H01L31/18
Abstract: PURPOSE: A method for manufacturing an avalanche photo diode is provided to suppress an edge breakdown by reducing the curvature of a junction interface without a guard ring. CONSTITUTION: A first conductive amplification layer(105) is formed on a first conductive substrate(101). A recess region including a first recess unit(113) and a second recess unit(117) is formed by etching the first conductive amplification layer. A second conductive diffusion layer(130) is formed by diffusing conductive diffusion materials to the first conductive amplification layer. A second conductive electrode(150) connected to the second conductive diffusion layer is formed on the first conductive amplification layer. A first conductive electrode(160) is formed on the rear of the first conductive substrate.
Abstract translation: 目的：提供一种制造雪崩光电二极管的方法，通过降低没有保护环的接合界面的曲率来抑制边缘击穿。 构成：第一导电性放电层（105）形成在第一导电性基板（101）上。 通过蚀刻第一导电放大层形成包括第一凹部单元（113）和第二凹部单元（117）的凹部区域。 通过将导电扩散材料扩散到第一导电放大层来形成第二导电扩散层（130）。 连接到第二导电扩散层的第二导电电极（150）形成在第一导电放大层上。 第一导电电极（160）形成在第一导电基板的后部。
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