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公开(公告)号：KR1020000018592A
公开(公告)日：2000-04-06
申请号：KR1019980036241
申请日：1998-09-03
Applicant: 한민구
IPC: H01L29/786
Abstract: PURPOSE: A manufacturing method of a TFT(Thin Film Transistor) is provided to improve a channel structure for optimizing a hydrogenating effect. CONSTITUTION: A manufacturing method of a TFT(Thin Film Transistor) comprises the steps of: forming a first insulation layer on a substrate; forming a first conductive layer on the first insulation layer; forming a multi channel having a plurality of channels for securing an inflow path of a hydrogen radical between the source/drain regions of an activation region in a succeeding hydrogenating process simultaneously with defining the activation region by performing a photo lithography and an etching precesses on the first conductive layer; forming a second insulation layer and a second conductive layer on the entire surface; forming a gate electrode having a plurality of grooves in the channel direction for securing an inflow path of a hydrogen radical in a succeeding hydrogenating process simultaneously with patterning the second insulation layer and the second conductive layer; forming injecting impurity ions into the gate electrode and source/drain regions by using the gate electrode as self-aligned ion-implanting mask and forming a passivation layer; performing a hydrogenating process on the entire surface; and connecting the gate electrode and the source/drain regions with a metal line for applying the external voltage to the gate electrode and the source/drain regions.
Abstract translation: 目的：提供TFT（薄膜晶体管）的制造方法，以改善用于优化氢化效果的通道结构。 构成：TFT（薄膜晶体管）的制造方法包括以下步骤：在基板上形成第一绝缘层; 在所述第一绝缘层上形成第一导电层; 形成具有多个通道的多通道，用于在后续氢化过程中在激活区域的源极/漏极区域之间固定氢自由基的流入路径，同时通过执行光刻和蚀刻进入限定激活区域 第一导电层; 在整个表面上形成第二绝缘层和第二导电层; 在所述沟道方向上形成具有多个槽的栅电极，用于在对所述第二绝缘层和所述第二导电层进行构图的同时，在随后的氢化工艺中固定氢自由基的流入路径; 通过使用栅电极作为自对准离子注入掩模形成注入杂质离子到栅电极和源/漏区，并形成钝化层; 在整个表面上进行氢化处理; 以及用栅极电极和源极/漏极区域施加外部电压的金属线连接栅极电极和源极/漏极区域。
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公开(公告)号：KR1019990084705A
公开(公告)日：1999-12-06
申请号：KR1019980016658
申请日：1998-05-09
Applicant: 한민구
IPC: H01S3/00
Abstract: 엑사이머 레이저 방사에 의한 폴리실리콘 싱글 일렉트론 소자의 제조방법에 따르면, 기판위에 아몰퍼스 실리콘 막, 절연막, 버퍼막을 차례로 형성하는 단계와, 상기 버퍼막을 사진식각하여 팁형상의 윈도우를 패턴하고 상기 아몰퍼스 실리콘을 결정화하기 위해 레이저 에너지를 방사하고 열처리하는 단계를 가짐에 의해, 적어도 하나의 폴리실리콘 그레인이 패턴된 윈도우 사이드로부터 성장 및 분리되게 하여 파인-그레인 라아지 폴리실리콘 양자 점을 얻는 것을 특징으로 한다.
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公开(公告)号：KR100275206B1
公开(公告)日：2001-01-15
申请号：KR1019980016658
申请日：1998-05-09
Applicant: 한민구
IPC: H01S3/00
Abstract: PURPOSE: A method for manufacturing poly-silicon single electron device via excimer-laser irradiation is provided to obtain poly-silicon islands whose size and location are precisely controlled and to form a single electron memory using the same by applying a lithography technique and an excimer laser annealing. CONSTITUTION: An amorphous silicon layer(4), an insulating layer(2) and a buffer layer(8) are successively formed on a substrate. The buffer layer is photo-etched to pattern a window in tip shape. To crystalize the amorphous silicon, annealing by irradiation of laser energy is carried out so that at least one poly silicon grain grows and is isolated around the center portion of the patterned tip to form a large fine-grain poly silicon quantum dot(40). The substrate consists of silicon material. The excimer laser is irradiated under 250deg.C of substrate temperature and 200mJ/cm¬2 of energy level. The quantum dot is an element of poly silicon single electron device.
Abstract translation: 目的：提供通过准分子激光照射制造多晶硅单电子器件的方法，以获得其尺寸和位置被精确控制的多晶硅岛，并通过应用光刻技术和准分子形成单个电子存储器 激光退火。 构成：在基板上依次形成非晶硅层（4），绝缘层（2）和缓冲层（8）。 对缓冲层进行光刻蚀以对尖端形状的窗口进行图案化。 为了使非晶硅晶化，进行通过激光能量的照射进行退火，使得至少一个多晶硅晶粒生长并围绕图案化尖端的中心部分分离以形成大的细晶粒多晶硅量子点（40）。 衬底由硅材料组成。 在250℃的基板温度和200mJ / cm 2的能级照射准分子激光。 量子点是多晶硅单电子器件的元素。
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公开(公告)号：KR100268063B1
公开(公告)日：2000-10-16
申请号：KR1019960053781
申请日：1996-11-13
IPC: H01L29/786
Abstract: PURPOSE: A thin film transistor having an area for suppressing a leakage current into a channel is provided to effectively reduce a leakage current in an off operation without an additional process, present the characteristic of an offset gate structure in an off state, operate as a non-offset structure in an on state, reduce the leakage current in larger numbers than that of a transistor composed of an offset structure without reducing the amount of an on current in an on operation than the amount of an on current of a transistor composed of a non-offset structure and operatively delete an offset area so as to have an enough gate driving capacity in a turn-on operation and operatively form the offset area so as to cut off a leakage current in a turn-off operation only. CONSTITUTION: The thin film transistor includes a channel area(12P), a gate insulating film(14), source and drain areas(12P(S),12P(D)) and a transparent gate area. The channel area has an off-set area(12a,12b) in the vicinity of both ends. The gate insulating film is formed on the channel area. The source area is formed to the first adjacent portion on the boundary the off-set area of the channel area. The drain area is formed to the second adjacent portion on the boundary the off-set area of the channel area. The transparent gate area is formed to the same length as the gate insulating film on the upper of the gate insulating and has an opaque film in the vicinity of both ends as a length being vertically opposite to the off-set area.
Abstract translation: 目的：提供一种薄膜晶体管，其具有用于抑制流入沟道的漏电流的区域，以便在没有附加处理的情况下有效地减少关断操作中的漏电流，将偏移栅极结构的特性呈现在断开状态，作为 非偏移结构处于导通状态，从而减小漏极电流大于由偏移结构组成的晶体管的漏电流，而不会减少导通电流导通电流的量，而不是由晶体管的导通电流量 非偏移结构，并且操作地删除偏移区域，以便在接通操作中具有足够的栅极驱动能力并且可操作地形成偏移区域，以便仅在关断操作中切断泄漏电流。 构成：薄膜晶体管包括沟道区（12P），栅极绝缘膜（14），源区和漏极区（12P（S），12P（D））和透明栅区。 通道区域在两端附近具有偏移区域（12a，12b）。 栅极绝缘膜形成在沟道区域上。 源极区域形成在边界上的第一相邻部分，该通道区域的偏移区域。 漏极区域形成在边界上的第二相邻部分，该通道区域的偏移区域。 透明栅极区域形成为与栅极绝缘体的上部的栅极绝缘膜相同的长度，并且在两端附近具有与偏移区域垂直相反的长度的不透明膜。
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公开(公告)号：KR1020000021320A
公开(公告)日：2000-04-25
申请号：KR1019980040336
申请日：1998-09-28
Applicant: 한민구
IPC: H01L21/335
Abstract: PURPOSE: A method for manufacturing an active layer of a thin film transistor and a structure thereof are to improve an electrical characteristic of the thin film transistor. CONSTITUTION: A method for manufacturing an active layer of a thin film transistor comprises the steps of: forming an amorphous silicon film(202) on a substrate(200); irradiating locally a light having an energy enough to change an amorphous silicon into a polycrystalline silicon on the amorphous silicon film; and forming a plurality of polycrystalline silicon regions(210) on the amorphous silicon film at fixed space. The polycrystalline silicon regions have a various shape. The amorphous silicon film and the polycrystalline silicon region are regularly formed to each other at a fixed space and have a mesh form and a honeycomb form.
Abstract translation: 目的：制造薄膜晶体管的有源层的方法及其结构是改善薄膜晶体管的电特性。 构成：制造薄膜晶体管有源层的方法包括以下步骤：在衬底（200）上形成非晶硅膜（202）; 局部照射具有足够能量的光以将非晶硅变成非晶硅膜上的多晶硅; 以及在所述非晶硅膜上以固定空间形成多个多晶硅区域（210）。 多晶硅区域具有各种形状。 非晶硅膜和多晶硅区域以固定的空间相互规则地形成，并且具有网状和蜂窝状。
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Patent Agency Ranking
公开(公告)号：KR100222436B1
公开(公告)日：1999-10-01
申请号：KR1019960036116
申请日：1996-08-28
IPC: H01J1/30
Abstract: 내부에 자체 진공을 보유하는 필드 에미션 증폭소자 및 그 제조방법이 개시된다. 개시된 필드 에미션 증폭소자는, 기판에 차례로 적층된 제1,2절연막을 통하여 상부에 수평으로 형성된 대체로 원뿔형의 캐소드와; 상기 캐소드와 이격되어 수평적으로 대향하는 애노드와; 상기 캐소드와 애노드를 이루는 도전막위에 차례로 적층된 제3,4절연막을 통하여 상부에 형성되고 상기 제1절연막의 일부에 밀착 형성되어 상기 캐소드와 애노드의 이격된 내부 공간을 진공상태로 유지시킴과 함께 상기 공간내부에 팁들을 형성하여 콘트롤 그리드로서 기능하는 게이트를 구비함을 특징으로 한다.
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公开(公告)号：KR100298488B1
公开(公告)日：2001-11-30
申请号：KR1019980040336
申请日：1998-09-28
Applicant: 한민구
IPC: H01L21/335
Abstract: 본 발명은 박막 트랜지스터의 활성층 제조 방법 및 그 구조에 관한 것이다. 본 발명에 따르면, 기판 상부에 비정질 실리콘막을 형성한 후, 비정질 실리콘을 다결정 실리콘화시킬 수 있을 정도의 에너지를 가지는 빛을 상기 비정질 실리콘에 국부적으로 조사한다. 그 결과, 상기 비정질 실리콘막에는 국부적으로 에너지가 조사된 다결정 실리콘막이 형성되어 비정질 실리콘과 다결정 실리콘의 중간 특성을 지니는 새로운 구조의 도전막이 형성되는데, 이를 박막 트랜지스터의 활성층으로 이용함으로써 박막 트랜지스터의 전기적 특성을 향상시킬 수 있게 된다.
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公开(公告)号：KR100268064B1
公开(公告)日：2000-10-16
申请号：KR1019980014713
申请日：1998-04-24
Applicant: 한민구
IPC: H01L21/31
Abstract: PURPOSE: A method for manufacturing an active layer for a semiconductor device is provided to form the active layer on the substrate with ease and to improve the electrical property such as electron mobility and uniformity of the layer. CONSTITUTION: The method includes following steps. At the first step, an amorphous silicon layer(4) is formed on the substrate(2). At the second step, an electron beam is illuminated with a predetermined pattern on the upper surface of the amorphous silicon layer. At the third step, the whole surface of the amorphous silicon layer is annealed with a laser beam having predetermined energy density and the amorphous silicon layer is converted to a polysilicon layer having a crystal structure based on the predetermined pattern. The substrate is made of glass or silicon material. The laser beam is generated by an excimer laser illuminating laser at an energy density between 255mJ/cm2 and 370mJ/cm2. The semiconductor substrate is thin film transistor.
Abstract translation: 目的：提供一种制造用于半导体器件的有源层的方法，以便容易地在衬底上形成有源层并改善诸如电子迁移率和层的均匀性的电特性。 规定：该方法包括以下步骤。 在第一步骤中，在衬底（2）上形成非晶硅层（4）。 在第二步骤中，在非晶硅层的上表面上以预定图案照射电子束。 在第三步骤中，非晶硅层的整个表面用具有预定能量密度的激光束进行退火，并且非晶硅层被转换成具有基于预定图案的晶体结构的多晶硅层。 基板由玻璃或硅材料制成。 激光束由能量密度为255mJ / cm 2至370mJ / cm 2的准分子激光照射激光产生。 半导体衬底是薄膜晶体管。
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公开(公告)号：KR1020000018593A
公开(公告)日：2000-04-06
申请号：KR1019980036242
申请日：1998-09-03
Applicant: 한민구
IPC: G02F1/136 , G02F1/133 , G02F1/1343
Abstract: PURPOSE: An interconnection structure of a thin film transistor liquid crystal display is provided to reduce dielectric capacity of interconnection in a region where a gate line is overlapped with a data line. CONSTITUTION: An interconnection structure of a thin film transistor liquid crystal display comprises a gate line, a data line which is overlapped with the gate line and passes the gate line, an interlayer insulating film formed between the gate line and the data line, and an air layer(vacuum layer) formed between the interlayer insulating film and the data line. Thin film transistors are formed at each region where the gate line is overlapped with the data line with a matrix shape.
Abstract translation: 目的：提供薄膜晶体管液晶显示器的互连结构，以减少栅极线与数据线重叠的区域中的互连的介质容量。 构成：薄膜晶体管液晶显示器的互连结构包括栅极线，与栅极线重叠并通过栅极线的数据线，形成在栅极线与数据线之间的层间绝缘膜，以及 在层间绝缘膜和数据线之间形成的空气层（真空层）。 在栅极线与矩阵形状的数据线重叠的每个区域处形成薄膜晶体管。
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