출력신호의 안정성을 가지는 비교기
    1.
    发明授权
    출력신호의 안정성을 가지는 비교기 有权
    具有稳定输出信号的比较器

    公开(公告)号:KR101342293B1

    公开(公告)日:2013-12-16

    申请号:KR1020120081599

    申请日:2012-07-26

    Abstract: A comparator capable of realizing a stabilized output signal is disclosed. A latch type comparator senses a difference of input signals in the positive edge of a clock signal and forms a first set signal and a first reset signal. A buffer part is included in order to stabilize the output level of the formed first set signal and first reset signal and enhance the drive efficiency of a device. A second set signal and a second reset signal are formed through a buffering operation and are inputted to a latch part with an expended swing width. A stabilized output range is secured by the forementioned. [Reference numerals] (100) Latch type comparator;(200) Buffer part;(300) Latch part

    Abstract translation: 公开了一种能够实现稳定的输出信号的比较器。 锁存型比较器检测时钟信号的上升沿中的输入信号的差异,并形成第一设定信号和第一复位信号。 为了稳定所形成的第一设定信号和第一复位信号的输出电平,增强了装置的驱动效率,包括缓冲部分。 通过缓冲操作形成第二设定信号和第二复位信号,并将其输入到具有消耗的摆动宽度的闩锁部分。 稳定的输出范围由前述确保。 (附图标记)(100)闩锁式比较器;(200)缓冲部;(300)闩锁部

    기준전압 발생기
    2.
    发明授权
    기준전압 발생기 有权
    参考电压发生器

    公开(公告)号:KR101417617B1

    公开(公告)日:2014-07-09

    申请号:KR1020130034776

    申请日:2013-03-29

    Inventor: 박상규 임새민

    CPC classification number: G05F3/205 G05F3/262 G11C5/146 G11C11/4074

    Abstract: Disclosed is a reference voltage generator which forms a constant output voltage even in a temperature change. The reference voltage generator has a reference voltage generation part which generates a reference voltage by the generation of a reference current and a start-up control part which induces the start-up operation of the reference voltage generation part. The start-up control part is connected to a temperature correction part which induces the generation of a constant reference current even in a temperature change. Especially, the start-up control part receives both terminal voltages of a detection resistance which is connected in series to the bipolar transistor of the temperature correction part and induces the start-up operation of the reference voltage generation part based on a received signal. Therefore, the start-up operation can be carried out by accurately detecting the operation condition of the temperature correction part which performs a temperature correction operation.

    Abstract translation: 公开了即使在温度变化中也形成恒定的输出电压的基准电压发生器。 参考电压发生器具有通过产生参考电流产生参考电压的参考电压产生部分和引起参考电压产生部分的启动操作的启动控制部分。 启动控制部连接到即使在温度变化中也引起恒定的基准电流的温度校正部。 特别地,启动控制部分接收与温度校正部分的双极晶体管串联连接的检测电阻的两端电压,并且基于接收信号引起基准电压产生部分的启动操作。 因此,可以通过精确检测执行温度校正操作的温度校正部的操作条件来进行启动操作。

    샘플링 정확도를 증가시키기 위한 아날로그 리셋 회로를 적용시킨 시그마-델타 아날로그-디지털 컨버터
    3.
    发明授权
    샘플링 정확도를 증가시키기 위한 아날로그 리셋 회로를 적용시킨 시그마-델타 아날로그-디지털 컨버터 有权
    SIGMA-DELTA模拟数字转换器使用模拟复位电路来提高采样精度

    公开(公告)号:KR101276439B1

    公开(公告)日:2013-06-19

    申请号:KR1020110120054

    申请日:2011-11-17

    Inventor: 박상규 임새민

    Abstract: 샘플링 정확도를 증가시키기 위한 스위칭 회로를 적용시킨 시그마-델타 아날로그-디지털 컨버터가 개시된다. 시그마-델타 방식의 아날로그-디지털 컨버터에 사용되는 스위치드-커패시터(switched capacitor) 적분기는 샘플링 클럭에 따라 스위치드-커패시터 적분기의 샘플링 동작(sampling phase)을 스위칭 하는 제1 스위칭 회로; 적분 클럭에 따라 스위치드-커패시터 적분기의 적분 동작(integration phase)을 스위칭 하는 제2 스위칭 회로; 및 리셋 클럭에 따라 스위치드-커패시터 적분기의 리셋 동작(reset phase)을 스위칭 하는 제3 스위칭 회로를 포함할 수 있다.

    샘플링 정확도를 증가시키기 위한 아날로그 리셋 회로를 적용시킨 시그마-델타 아날로그-디지털 컨버터
    4.
    发明公开
    샘플링 정확도를 증가시키기 위한 아날로그 리셋 회로를 적용시킨 시그마-델타 아날로그-디지털 컨버터 有权
    SIGMA-DELTA模拟数字转换器使用模拟复位电路来提高采样精度

    公开(公告)号:KR1020130054588A

    公开(公告)日:2013-05-27

    申请号:KR1020110120054

    申请日:2011-11-17

    Inventor: 박상규 임새민

    Abstract: PURPOSE: A sigma-delta analog-digital converter is provided to increase overall resolution. CONSTITUTION: An operational amplifier(10) connects an input terminal to a fourth node(D) and connects an output terminal to an output end. A sampling capacitor(20) connects one end to a second node, connects the other end to a third node and samples. An integral capacitor(30) connects one end to the fourth node, connects the other end to an output terminal of the operational amplifier and feedbacks. A first switching circuit(40) switches sampling operation of a switched-capacitor integrator according to a sampling clock. A second switching circuit(50) switches integration operation of the switched-capacitor integrator according to an integration clock. A third switching circuit(70) switches reset operation of the switched-capacitor integrator according to a reset clock.

    Abstract translation: 目的:提供Σ-Δ模数转换器以提高整体分辨率。 构成:运算放大器(10)将输入端子连接到第四节点(D),并将输出端子连接到输出端。 采样电容器(20)将一端连接到第二节点,将另一端连接到第三节点并采样。 整体电容器(30)将一端连接到第四节点,将另一端连接到运算放大器的输出端并进行反馈。 第一开关电路(40)根据采样时钟切换开关电容积分器的采样操作。 第二开关电路(50)根据积分时钟切换开关电容积分器的积分动作。 第三开关电路(70)根据复位时钟切换开关电容积分器的复位动作。

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