公开(公告)号：WO1996012297A2

公开(公告)日：1996-04-25

申请号：PCT/US1995012194

申请日：1995-09-25

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  HUANG, Richard, J. ,  HUI, Angela ,  CHEUNG, Robin ,  CHANG, Mark ,  LIN, Ming-Ren

IPC: H01L21/768

CPC classification number: H01L21/7681 ,  H01L21/76807 ,  H01L21/76813

Abstract: A semiconductor device containing an interconnection structure having a reduced interwiring spacing is produced by a modified dual damascene process. An embodiment comprises the simultaneous formation of a via and trench in a single etching step.

Abstract translation: 使用改进的双镶嵌工艺来制造包含具有减小的布线连接间隙的互连结构的半导体器件。 一个实施例是在单个蚀刻步骤中同时产生通孔和沟槽。

公开(公告)号：EP1019959A1

公开(公告)日：2000-07-19

申请号：EP98913232.9

申请日：1998-03-27

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： MAY, Charles ,  CHEUNG, Robin

IPC: H01L21/768 ,  H01L21/3105

CPC classification number: H01L21/02126 ,  H01L21/02134 ,  H01L21/31053 ,  H01L21/3121 ,  H01L21/31629 ,  H01L21/76819 ,  H01L23/5329 ,  H01L2924/0002 ,  Y10S438/906 ,  H01L2924/00

Abstract: A method of making a semiconductor device includes forming a low permittivity dielectric layer over one or more conductive lines of a semiconductor device. The dielectric layer is made using a silicon-containing material having a relatively low permittivity including, for example, silicon oxyfluoride (SiOyFx) and hydrogen silsesquioxane (HSQ). An optional oxide layer may be formed over the dielectric layer. At least a portion of the dielectric layer and/or the optional oxide layer is subsequently removed to form a planar dielectric layer having a contaminated surface layer. The contaminated surface layer is due to exposure to water and is removed by, for example, exposing the surface to an acid, such as hydrofluoric acid.

公开(公告)号：EP0761014A1

公开(公告)日：1997-03-12

申请号：EP95935091.0

申请日：1995-09-25

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： HUANG, Richard, J. ,  HUI, Angela ,  CHEUNG, Robin ,  CHANG, Mark ,  LIN, Ming-Ren

IPC: H01L21

CPC classification number: H01L21/7681 ,  H01L21/76807 ,  H01L21/76813

Abstract: A semiconductor device containing an interconnection structure having a reduced interwiring spacing is produced by a modified dual damascene process. An embodiment comprises the simultaneous formation of a via and trench in a single etching step.

公开(公告)号：EP0761014B1

公开(公告)日：2003-07-09

申请号：EP95935091.9

申请日：1995-09-25

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： HUANG, Richard, J. ,  HUI, Angela ,  CHEUNG, Robin ,  CHANG, Mark ,  LIN, Ming-Ren

IPC: H01L21/768

CPC classification number: H01L21/7681 ,  H01L21/76807 ,  H01L21/76813

Abstract: A semiconductor device containing an interconnection structure having a reduced interwiring spacing is produced by a modified dual damascene process. An embodiment comprises the simultaneous formation of a via and trench in a single etching step.

公开(公告)号：EP1019959B1

公开(公告)日：2003-02-12

申请号：EP98913232.9

申请日：1998-03-27

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： MAY, Charles ,  CHEUNG, Robin

IPC: H01L21/768 ,  H01L21/3105

CPC classification number: H01L21/02126 ,  H01L21/02134 ,  H01L21/31053 ,  H01L21/3121 ,  H01L21/31629 ,  H01L21/76819 ,  H01L23/5329 ,  H01L2924/0002 ,  Y10S438/906 ,  H01L2924/00

Abstract: A method of making a semiconductor device includes forming a low permittivity dielectric layer over one or more conductive lines of a semiconductor device. The dielectric layer is made using a silicon-containing material having a relatively low permittivity including, for example, silicon oxyfluoride (SiOyFx) and hydrogen silsesquioxane (HSQ). An optional oxide layer may be formed over the dielectric layer. At least a portion of the dielectric layer and/or the optional oxide layer is subsequently removed to form a planar dielectric layer having a contaminated surface layer. The contaminated surface layer is due to exposure to water and is removed by, for example, exposing the surface to an acid, such as hydrofluoric acid.

Abstract translation: 制造半导体器件的方法包括在半导体器件的一个或多个导电线上形成低介电常数介电层。 电介质层使用包含例如氟氧化硅（SiO yF x）和氢倍半硅氧烷（HSQ））的具有较低介电常数的含硅材料制成。 可以在电介质层上形成任选的氧化物层。 随后去除介电层和/或任选的氧化物层的至少一部分以形成具有污染表面层的平面介电层。 受污染的表面层是由于暴露在水中而被除去，例如通过将表面暴露于酸如氢氟酸。