公开(公告)号：WO1997006558A1

公开(公告)日：1997-02-20

申请号：PCT/US1996012852

申请日：1996-08-07

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  WANG, Larry, Yu ,  OMID-ZOHOOR, Farrokh

IPC: H01L21/762

CPC classification number: H01L21/76224 ,  H01L21/3085 ,  H01L21/3086

Abstract: A method for rounding corners in a trench is provided. In one embodiment, the method is applied to round the corners of a trench formed in a substrate. A hard mask layer is formed on the substrate. The hard mask layer is patterned by photolithography and then etched to form hard masks. Then a conformal layer is formed above the hard masks and substrate. The conformal layer is then etched to the substrate, thereby forming a rounded spacer structure around each hard mask. Then the trench is etched in the substrate between hard masks using an etch method that etches the substrate selective to the hard masks and relatively non-selective to spacer structures. As a result, the rounded shaped of the spacer structure is transferred to the substrate.

Abstract translation: 提供了一种用于在沟槽中对角进行四舍五入的方法。 在一个实施例中，该方法被应用于围绕在衬底中形成的沟槽的角部。 在基板上形成硬掩模层。 通过光刻将硬掩模层图案化，然后蚀刻以形成硬掩模。 然后在硬掩模和基底上形成共形层。 然后将共形层蚀刻到基底上，从而在每个硬掩模周围形成圆形间隔结构。 然后，使用蚀刻对硬掩模有选择性的衬底和对间隔结构相对非选择性的蚀刻方法，在硬掩模之间的衬底中蚀刻沟槽。 结果，间隔结构的圆形被转移到基底。

公开(公告)号：EP1269537A1

公开(公告)日：2003-01-02

申请号：EP01914573.9

申请日：2001-02-27

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： WANG, Larry, Yu ,  AVANZINO, Steven, C. ,  SHIELDS, Jeffrey, A. ,  PARK, Stephen, Keetai

IPC: H01L21/8247 ,  H01L27/115

CPC classification number: H01L27/11521 ,  H01L27/115

Abstract: An article and method of manufacturing a semiconductor flash cell. The method includes producing an isolation formation layer (10) on a silicon substrate (12), forming an oxide (14) on the isolation formation layer (10), growing a tunnel oxide layer (16) thereon, depositing a first poly silicon layer (18), masking and etching the first poly silicon layer (18), depositing a second poly silicon layer (22) and performing a blanket etch back step, forming an oxide/nitride/oxide layer (26) forming a third poly-silicon layer (28) and depositing a silicide layer (30) thereon.

公开(公告)号：EP1269537B1

公开(公告)日：2007-06-13

申请号：EP01914573.9

申请日：2001-02-27

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： WANG, Larry, Yu ,  AVANZINO, Steven, C. ,  SHIELDS, Jeffrey, A. ,  PARK, Stephen, Keetai

IPC: H01L21/8247 ,  H01L27/115

CPC classification number: H01L27/11521 ,  H01L27/115

Abstract: An article and method of manufacturing a semiconductor flash cell. The method includes producing an isolation formation layer (10) on a silicon substrate (12), forming an oxide (14) on the isolation formation layer (10), growing a tunnel oxide layer (16) thereon, depositing a first poly silicon layer (18), masking and etching the first poly silicon layer (18), depositing a second poly silicon layer (22) and performing a blanket etch back step, forming an oxide/nitride/oxide layer (26) forming a third poly-silicon layer (28) and depositing a silicide layer (30) thereon.