公开(公告)号：GB2279830A

公开(公告)日：1995-01-11

申请号：GB9413399

申请日：1994-07-04

Applicant: ALTERA CORP

Inventor： KIANI KUSHROW ,  BALICKI JANUSZ K ,  NOUBAN BEHZAD ,  LI KEN

IPC: H03K19/173 ,  H03K19/177

Abstract: A macrocell 100 for use in a programmable logic device (PLD) includes two reprogrammable look-up tables 102, 104 for increased fan-in, and two flip-flops 126, 128 that increases fan-out, thereby doubling logic capability of the PLD without unacceptably increasing device size. The second register 126 can be used for receiving fast input signals 120 form an input to the PLD to reduce setup time. The allocation input and output lines allow cascading of macrocells. Programmable elements 108 - 124 may be implemented by RAM, EPROM, or fuse link memory cells.

公开(公告)号：GB2308250A

公开(公告)日：1997-06-18

申请号：GB9622934

申请日：1996-11-04

Applicant: ALTERA CORP

Inventor： TURNER JOHN E ,  NOUBAN BEHZAD

IPC: H03K5/00 ,  H03K5/159 ,  H03L7/081 ,  H03L7/16

公开(公告)号：GB2308249A

公开(公告)日：1997-06-18

申请号：GB9622910

申请日：1996-11-04

Applicant: ALTERA CORP

Inventor： BALICKI JANUSZ K ,  NOUBAN BEHZAD

IPC: H03K5/00 ,  H03K5/159

公开(公告)号：GB2279830B

公开(公告)日：1997-04-23

申请号：GB9413399

申请日：1994-07-04

Applicant: ALTERA CORP

Inventor： KIANI KUSHROW ,  BALICKI JANUSZ K ,  NOUBAN BEHZAD ,  LI KEN

IPC: H03K19/173 ,  H03K19/177

公开(公告)号：DE69113073D1

公开(公告)日：1995-10-26

申请号：DE69113073

申请日：1991-01-28

Applicant: ALTERA CORP

Inventor： NORMAN KEVIN A ,  SANSBURY JAMES D ,  HERRMANN ALAN L ,  HENDRICKS MATTHEW C ,  NOUBAN BEHZAD

IPC: G11C17/00 ,  G11C16/02 ,  G11C16/04 ,  G11C16/10 ,  G11C16/34 ,  G11C16/06