Abstract:
PROBLEM TO BE SOLVED: To provide a host/peripheral local interconnect that is compatible with a self-configurable peripheral device. SOLUTION: The host device may be kept aware of the self-configured state of the peripheral device, and/or self-configured changes made at the peripheral device. The host device may scale its applications/uses of the peripheral device in light of such awareness. The peripheral device and the host device are not mechanically integrated but locally interconnected through point-to-point connection. The host queries the peripheral device with respect to configuration, receives a suggested configuration from the peripheral device, receives link-state information specifying that the peripheral device is connected to a network supporting tethering, and activates a tethering interface for enabling the host to be tethered through the peripheral device. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
When a peripheral device 502 is connected to a host device 501, the peripheral detects whether it is connected to a network 505 and whether the network supports tethering. The host device requests the peripheral's current configuration and the peripheral indicates to the host that it supports tethering if it is connected to a network which supports tethering. The host may then configure the peripheral and tray activate a tethered network connection 509 via the peripheral. If the peripheral then detects that it is no longer connected to the network, it may signal this to the host. The tethered interface may then be deactivated. The host and the device may communicate via Bluetooth or Universal Serial Bus 510. The peripheral may communicate with the network using a 3G or EDGE interface. The device may have configurations as a camera, a music player, an address book and calendar or for tethering.
Abstract:
A host/peripheral local interconnect that is compatible with a self-configurable peripheral device is described. According to processes discussed herein, the peripheral device is self-configured. The host device may be kept aware of the self-configured state of the peripheral device, and/or self-configured changes made at the peripheral device. The host device may scale its applications/uses of the peripheral device in light of such awareness.
Abstract:
A communication link between a host device and a client device can be suspended based on a suspend request or notification provided by the client device. The suspend request can be transmitted by a client device to a host device if the client device determines that suspension is appropriate, and can be sent in response to receiving a polling request from the host device. After receiving a suspend request, the host device can initiate an operation to suspend the communication link between the devices.
Abstract:
In a network comprising a host device (eg. an applications processor, 110, fig. 1) and a client device (130, fig. 1) connected via a communications channel (150, fig. 1), which may all reside in a â networkâ on the same device (eg. a smartphone 100), the host suspends (eg. places in low-power mode) communications on the link when a polling request from the host returns a suspend request (eg. a negative acknowledgement or NAK) from the client. Under the USB protocol, the client cannot transmit a suspend request unprompted, and so enumeration (eg. configuration) information and IN or OUT tokens are exchanged before generating a Suspend Request 1210. Each â client deviceâ may be an integrated circuit running a function (eg. phone, GPS etc.) which inputs to the same host processor via a USB High Speed Inter-Chip (HSIC) link.
Abstract:
A host/peripheral local interconnect that is compatible with a self- configurable peripheral device is described. According to processes discussed herein, the peripheral device is self-configured. The host device may be kept aware of the self-configured state of the peripheral device, and/or self-configured changes made at the peripheral device. The host device may scale its applications/uses of the peripheral device in light of such awareness.
Abstract:
When a peripheral device 502 is connected to a host device 501, the peripheral detects whether it is connected to a network 505 and whether the network supports tethering. The host device requests the peripheral's current configuration and the peripheral indicates to the host that it supports tethering if it is connected to a network which supports tethering. The host may then configure the peripheral and may activate a tethered network connection 509 via the peripheral. If the peripheral then detects that it is no longer connected to the network, it may signal this to the host. The tethered interface may then be deactivated. The host and the device may communicate via Bluetooth or Universal Serial Bus 510. The peripheral may communicate with the network using a 3G or EDGE interface.
Abstract:
Integrierte Schaltung (10), umfassend:mindestens einen Prozessor (30), der eine Zentraleinheit in der integrierten Schaltung (10) bildet;eine Energieverwaltungsschaltung (32), konfiguriert zum Übertragen von Spannungsanforderungen an eine Energieverwaltungseinheit (156), die extern zur integrierten Schaltung (10) ist, wobei die Spannungsanforderungen Anforderungen sind, um eine oder mehrere Stromversorgungsspannungen zur integrierten Schaltung (10) zu leiten;einen Speicher-Controller (22), gekoppelt mit einem Speicher (12) während des Betriebs, wobei die Energieverwaltungsschaltung (32) konfiguriert ist, um ein Herunterfahren des Speicher-Controllers (22) über eine Kommunikation mit der Energieverwaltungseinheit (156) zu veranlassen; undeine erste, mit dem Prozessor (30) und dem Speicher-Controller (22) gekoppelte Komponente (16), wobei die erste Komponente (16) konfiguriert ist, um eingeschaltet zu bleiben, während der Prozessor (30), die Energieverwaltungsschaltung (32) und der Speicher-Controller (22) abgeschaltet sind, und wobei die erste Komponente (16) separat von der Energieverwaltungsschaltung (32) mit der Energieverwaltungseinheit (156) gekoppelt ist, und wobei die erste Komponente (16) konfiguriert ist, um das Hochfahren des Speicher-Controllers (22) über die separate Kopplung mit der Energieverwaltungseinheit (156) zu veranlassen, um den Speicher-Controller (22) unter Verwendung der in der ersten Komponente (16) gespeicherten Konfigurationsdaten des Speicher-Controllers (22) zu programmieren und um mit dem Speicher-Controller (22) während einer Zeit, in der der Prozessor (30) heruntergefahren ist, zu kommunizieren.
Abstract:
In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
Abstract:
Bei einer Ausführungsform schließt ein System-on-a-Chip (SOC) eine Komponente ein, die eingeschaltet bleibt, wenn der Rest des SOC abgeschaltet ist. Die Komponente kann eine Sensorerfassungseinheit einschließen, um Daten von verschiedenen Vorrichtungssensoren zu erfassen, und sie kann die erfassten Sensordaten filtern. Als Reaktion auf das Filtern kann die Komponente den Rest des SOC aufwecken, um die Verarbeitung zu ermöglichen. Die Komponente kann programmierbare Konfigurationsdaten, die dem Zustand zum Zeitpunkt, zu dem das SOC zuletzt abgeschaltet wurde, entsprechen, für die anderen Komponenten des SOC speichern, um sie nach dem Aufwecken neu zu programmieren. Bei einigen Ausführungsformen kann die Komponente konfiguriert sein, um den Speicher-Controller im SOC und den Pfad zum Speicher-Controller aufzuwecken, um die Daten in den Speicher zu schreiben. Der Rest des SOC kann abgeschaltet bleiben.