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    SIMULTANEOUS DATA TRANSFER AND ERROR CONTROL TO REDUCE LATENCY AND IMPROVE THROUGHPUT TO A HOST
    1.
    发明申请
    SIMULTANEOUS DATA TRANSFER AND ERROR CONTROL TO REDUCE LATENCY AND IMPROVE THROUGHPUT TO A HOST 审中-公开
    同时进行数据传输和错误控制以减少延迟并改善对主机的影响

    公开(公告)号：WO2013033121A1

    公开(公告)日：2013-03-07

    申请号：PCT/US2012/052713

    申请日：2012-08-28

    Applicant: APPLE INC. ,  SARCONE, Christopher J. ,  CONROY, David G. ,  KELLER, Jim

    Inventor： SARCONE, Christopher J. ,  CONROY, David G. ,  KELLER, Jim

    IPC: G06F11/10

    CPC classification number: H04L1/08 ,  G06F11/10 ,  H04L1/004

    Abstract: The disclosed embodiments provide a system that transfers data from a storage device to a host. The system includes a communication mechanism that receives a request to read a set of blocks from the host. Next, upon reading each block from the set of blocks from the storage device, the communication mechanism transfers the block over an interface with the host. The system also includes an error-detection apparatus that performs error detection on the block upon reading the block, and an error-correction apparatus that performs error correction on the block if an error is detected in the block. The communication mechanism may then retransfer the block to the host after the error is removed from the block.

    Abstract translation: 所公开的实施例提供了将数据从存储设备传送到主机的系统。 该系统包括一个通信机制，其接收从主机读取一组块的请求。 接下来，在从存储装置读取块集合中的每个块时，通信机制通过与主机的接口传送块。 该系统还包括在读取该块时对块执行错误检测的错误检测装置，以及如果在该块中检测到错误则对该块执行错误校正的纠错装置。 然后，在从块中移除错误之后，通信机制可以将块重新传送到主机。

    MEDIA PROCESSING METHOD AND DEVICE
    2.
    发明申请
    MEDIA PROCESSING METHOD AND DEVICE 审中-公开
    媒体处理方法和装置

    公开(公告)号：WO2010017034A1

    公开(公告)日：2010-02-11

    申请号：PCT/US2009/051436

    申请日：2009-07-22

    Applicant: APPLE INC. ,  CONROY, David G. ,  CORLETT, Barry ,  LINDAHL, Aram ,  SCHELL, Steve ,  WARREN, Niel D.

    Inventor： CONROY, David G. ,  CORLETT, Barry ,  LINDAHL, Aram ,  SCHELL, Steve ,  WARREN, Niel D.

    IPC: G06F13/12 ,  G06F1/32

    CPC classification number: G06F17/00 ,  G06F1/3203 ,  G06F1/3237 ,  G06F1/3287 ,  G06F1/3293 ,  G06F13/124 ,  G06F21/10 ,  G06F21/71 ,  G06F2221/0735 ,  Y02D10/122 ,  Y02D10/128 ,  Y02D10/171 ,  Y02D50/20

    Abstract: A media processing system and device 100 with improved power usage characteristics, improved audio functionality and improved media security is provided. Embodiments of the media processing system 100 include an audio processing subsystem 301 that operates independently of the host processor 304 for long periods of time, allowing the host processor 304 to enter a low power state. Other aspects of the media processing system 100 provide for enhanced audio effects such as mixing stored audio samples into real-time telephone audio. Still other aspects of the media processing system 100 provide for improved media security due to the isolation of decrypted audio data from the host processor 304.

    Abstract translation: 提供了具有改进的功率使用特性，改进的音频功能和改进的媒体安全性的媒体处理系统和设备100。 媒体处理系统100的实施例包括音频处理子系统301，其独立于主处理器304长时间运行，允许主机处理器304进入低功率状态。 媒体处理系统100的其他方面提供增强的音频效果，例如将存储的音频样本混合成实时电话音频。 媒体处理系统100的其他方面由于从主机处理器304隔离解密的音频数据来提供改善的媒体安全性。

    METHOD AND APPARATUS FOR SWITCHING BETWEEN GRAPHICS SOURCES
    4.
    发明公开
    METHOD AND APPARATUS FOR SWITCHING BETWEEN GRAPHICS SOURCES 审中-公开
    方法和设备用于图形波之间的切换

    公开(公告)号：EP2052315A1

    公开(公告)日：2009-04-29

    申请号：EP07809582.5

    申请日：2007-06-14

    Applicant: Apple Inc.

    Inventor： CONROY, David G. ,  CULBERT, Michael F. ,  ATHAS, William C. ,  HOWARD, Brian D.

    IPC: G06F3/14

    CPC classification number: G09G5/363 ,  G06F3/1438 ,  G09G5/12 ,  G09G2330/021 ,  G09G2360/06

    Abstract: One embodiment of the present invention provides a system that switches from a first graphics processor to a second graphics processor to drive a display. During operation, the system receives a request to switch a signal source which drives the display from the first graphics processor to the second graphics processor. In response to the request, the system first configures the second graphics processor so that the second graphics processor is ready to drive the display. Next, the system switches the signal source that drives the display from the first graphics processor to the second graphics processor, thereby causing the second graphics processor to drive the display.

    SIMULTANEOUS DATA TRANSFER AND ERROR CONTROL TO REDUCE LATENCY AND IMPROVE THROUGHPUT TO A HOST
    6.
    发明公开
    SIMULTANEOUS DATA TRANSFER AND ERROR CONTROL TO REDUCE LATENCY AND IMPROVE THROUGHPUT TO A HOST 审中-公开
    同时通信和差错控制以缩短延迟并提高对主机的流量

    公开(公告)号：EP2751688A1

    公开(公告)日：2014-07-09

    申请号：EP12756317.9

    申请日：2012-08-28

    Applicant: Apple Inc.

    Inventor： SARCONE, Christopher J. ,  CONROY, David G. ,  KELLER, Jim

    IPC: G06F11/10

    CPC classification number: H04L1/08 ,  G06F11/10 ,  H04L1/004

    Abstract: The disclosed embodiments provide a system that transfers data from a storage device to a host. The system includes a communication mechanism that receives a request to read a set of blocks from the host. Next, upon reading each block from the set of blocks from the storage device, the communication mechanism transfers the block over an interface with the host. The system also includes an error-detection apparatus that performs error detection on the block upon reading the block, and an error-correction apparatus that performs error correction on the block if an error is detected in the block. The communication mechanism may then retransfer the block to the host after the error is removed from the block.

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