公开(公告)号：US20230307380A1

公开(公告)日：2023-09-28

申请号：US17705216

申请日：2022-03-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Nan LIN ,  Ming-Chiang LEE ,  Yung-I YEH

IPC: H01L23/00 ,  H01L25/18 ,  H01L23/538

CPC classification number: H01L23/562 ,  H01L25/18 ,  H01L23/5385 ,  H01L24/48 ,  H01L2224/48145

Abstract: A semiconductor device package is disclosed. The semiconductor device package includes a carrier, a first electronic component disposed on the carrier and a support component disposed on the carrier. The semiconductor device package also includes a second electronic component disposed on the first electronic component and supported by the support component.

公开(公告)号：US20150115469A1

公开(公告)日：2015-04-30

申请号：US14523733

申请日：2014-10-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun-Che LEE ,  Ming-Chiang LEE

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/49827 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L2224/16225 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/007 ,  H05K3/4682 ,  H05K2201/09227 ,  H05K2201/09563 ,  H05K2201/09772 ,  H05K2201/10674 ,  H01L2924/00

Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

Abstract translation: 提供半导体基板及其制造方法。 半导体衬底包括电介质层，电路层，第一保护层和多个导电柱。 电介质层具有彼此相对的第一表面和第二表面。 电路层嵌入电介质层并从第一表面露出。 第一保护层覆盖第一电路层的一部分并且限定暴露第一电路层的剩余部分的多个孔。 导电柱形成在孔中。

公开(公告)号：US20140144683A1

公开(公告)日：2014-05-29

申请号：US14169640

申请日：2014-01-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kuo-Hua CHEN ,  Ming-Chiang LEE ,  Tsung-Hsun LEE ,  Chen-Chuan FAN

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/09

CPC classification number: H05K1/0298 ,  H01L23/3128 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K1/09 ,  H05K1/116 ,  H05K2201/09781

Abstract: A substrate structure is provided. The substrate structure includes a number of traces, a substrate core, a number of first metal tiles, a number of second metal tiles, a number of first electrically-functioning circuits, and a number of second electrically-functioning circuits. The substrate core has a first surface and a second surface opposite to the first surface. The traces, the first metal tiles, and the first electrically-functioning circuits are disposed on the first surface and add up to a first metal structure proportion, and the second metal tiles and the second electrically-functioning circuits are disposed on the second surface and add up to a second metal structure proportion. The difference between the first metal structure proportion and the second metal structure proportion is within 15%.

Abstract translation: 提供了基板结构。 衬底结构包括多个迹线，衬底芯，多个第一金属瓦，多个第二金属瓦，多个第一电功能电路和多个第二电功能电路。 衬底芯具有与第一表面相对的第一表面和第二表面。 迹线，第一金属瓦片和第一电功能电路设置在第一表面上并且加到第一金属结构比例，并且第二金属瓦片和第二电功能电路设置在第二表面上， 加起来第二个金属结构比例。 第一金属结构比例与第二金属结构比例之差在15％以内。

公开(公告)号：US20220359361A1

公开(公告)日：2022-11-10

申请号：US17873085

申请日：2022-07-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun-Che LEE ,  Ming-Chiang LEE ,  Yuan-Chang SU ,  Tien-Szu CHEN ,  Chih-Cheng LEE ,  You-Lung YEN

IPC: H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H01L21/48

Abstract: A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.