公开(公告)号：AU5297093A

公开(公告)日：1994-04-26

申请号：AU5297093

申请日：1993-09-29

Applicant: COMPAQ COMPUTER CORP

Inventor： CULLEY PAUL R ,  LANDRY JOHN A ,  MAYER DALE J ,  WANNER CHRISTOPHER C ,  MCSWAIN GUY E

IPC: G06F13/24 ,  G06F13/32 ,  G06F15/80

Abstract: An arrangement of direct memory access (DMA), interrupt and timer functions in a multiprocessor computer system to allow symmetrical processing. Several functions which are considered common to all of the CPUs and those which are conveniently accessed through an expansion bus remain in a central system peripheral chip coupled to the expansion bus. These central functions include the primary portions of the DMA controller and arbitration circuitry to control access of the expansion bus. A distributed peripheral, including a programmable interrupt controller, multiprocessor interrupt logic, nonmaskable interrupt logic, local DMA logic and timer functions, is provided locally for each CPU. A bus is provided between the central and distributed peripherals to allow the central peripheral to broadcast information to the CPUs, and to provide local information from the distributed chip to the central peripheral when the local CPU is programming or accessing functions in the central peripheral.