1.
    发明专利
    未知

    公开(公告)号:DE69521210T2

    公开(公告)日:2001-11-22

    申请号:DE69521210

    申请日:1995-12-29

    Abstract: The present invention relates to an electronic device integrated monolithically on a semiconductor material comprising a substrate (1) having a first conductivity type in which are formed a first (2) and second diffusion regions (3) of a second conductivity type with said substrate (1) and said first (2) and second (3) diffusion regions including respectively a base region, a collector region and an emitter region of a transistor (Tp1) and characterized in that in the second diffusion region (3) is formed a third diffusion region (8) having conductivity of the first type to provide in said second diffusion region (3) a resistive path (R) placed in series with the emitter region of the transistor (Tp1) while backfeeding it negatively and taking it to saturation with a resulting reduction of its current gain and limitation of the maximum current due thereto.

    2.
    发明专利
    未知

    公开(公告)号:DE69518064D1

    公开(公告)日:2000-08-24

    申请号:DE69518064

    申请日:1995-03-22

    Abstract: Junction isolation between a second region (2) that is normally clamped at a reference potential, contained within a first region (1) of an opposite type of conductivity whose potential (V1) is subject to large inertial swings is ensured even when the potential of said first region (1) moves toward and beyond the reference potential to which said second region (2) is clamped by clamping said second region (2) to said reference potential by a switch (T) causing the switch (T) to open thus placing the second region (2) in a floating state free to track the potential excursion of the first region (1) and closing again the switch (T) after the potential of the first region (1) has returned to a normal value. A comparator senses a shift of the potential of the second region (2) from the reference potential to which is clamped which is dynamically induded by the capacitive coupling of the two regions, and triggers off the clamping switch (T).

    3.
    发明专利
    未知

    公开(公告)号:DE69530077D1

    公开(公告)日:2003-04-30

    申请号:DE69530077

    申请日:1995-07-31

    Abstract: The principle on which the start up circuit of this invention operates is that of causing the MOS transistor (M2) to be turned on by sensing local electrical quantities thereof, specifically the potential at the drain terminal (D) of the MOS transistor (M2). The basic idea is to inject a small current into the control terminal (G) when the potential at the drain terminal (D) is high. For the purpose, an electric network (SN) is arranged to couple these two terminals together.

    4.
    发明专利
    未知

    公开(公告)号:DE69518064T2

    公开(公告)日:2000-12-21

    申请号:DE69518064

    申请日:1995-03-22

    Abstract: Junction isolation between a second region (2) that is normally clamped at a reference potential, contained within a first region (1) of an opposite type of conductivity whose potential (V1) is subject to large inertial swings is ensured even when the potential of said first region (1) moves toward and beyond the reference potential to which said second region (2) is clamped by clamping said second region (2) to said reference potential by a switch (T) causing the switch (T) to open thus placing the second region (2) in a floating state free to track the potential excursion of the first region (1) and closing again the switch (T) after the potential of the first region (1) has returned to a normal value. A comparator senses a shift of the potential of the second region (2) from the reference potential to which is clamped which is dynamically induded by the capacitive coupling of the two regions, and triggers off the clamping switch (T).

    5.
    发明专利
    未知

    公开(公告)号:DE69530077T2

    公开(公告)日:2003-11-27

    申请号:DE69530077

    申请日:1995-07-31

    Abstract: The principle on which the start up circuit of this invention operates is that of causing the MOS transistor (M2) to be turned on by sensing local electrical quantities thereof, specifically the potential at the drain terminal (D) of the MOS transistor (M2). The basic idea is to inject a small current into the control terminal (G) when the potential at the drain terminal (D) is high. For the purpose, an electric network (SN) is arranged to couple these two terminals together.

    6.
    发明专利
    未知

    公开(公告)号:DE69521210D1

    公开(公告)日:2001-07-12

    申请号:DE69521210

    申请日:1995-12-29

    Abstract: The present invention relates to an electronic device integrated monolithically on a semiconductor material comprising a substrate (1) having a first conductivity type in which are formed a first (2) and second diffusion regions (3) of a second conductivity type with said substrate (1) and said first (2) and second (3) diffusion regions including respectively a base region, a collector region and an emitter region of a transistor (Tp1) and characterized in that in the second diffusion region (3) is formed a third diffusion region (8) having conductivity of the first type to provide in said second diffusion region (3) a resistive path (R) placed in series with the emitter region of the transistor (Tp1) while backfeeding it negatively and taking it to saturation with a resulting reduction of its current gain and limitation of the maximum current due thereto.

    7.
    发明专利
    未知

    公开(公告)号:DE69523908T2

    公开(公告)日:2002-07-25

    申请号:DE69523908

    申请日:1995-07-31

    Abstract: A first principle on which the driver circuit of this invention operates is to delay the turning on of the MOS transistor (M2) by utilizing the time-wise pattern of the circuit input (G) signal rather than generating a delay within the circuit itself. The basic idea is one of using a threshold type of circuit element and arranging for no current to flow toward or from, depending on the type of the MOS transistor, the control terminal before the voltage at the circuit input exceeds a predetermined value. This is achieved, for example, by coupling a Zener diode (D1) serially to the control terminal. Where the input signal is of a kind which increases with a degree of uniformity, the time required to exceed that threshold will correspond to the desired delay. Thus, the driver circuit can match the dynamic range of the input signal automatically.

    8.
    发明专利
    未知

    公开(公告)号:DE69523908D1

    公开(公告)日:2001-12-20

    申请号:DE69523908

    申请日:1995-07-31

    Abstract: A first principle on which the driver circuit of this invention operates is to delay the turning on of the MOS transistor (M2) by utilizing the time-wise pattern of the circuit input (G) signal rather than generating a delay within the circuit itself. The basic idea is one of using a threshold type of circuit element and arranging for no current to flow toward or from, depending on the type of the MOS transistor, the control terminal before the voltage at the circuit input exceeds a predetermined value. This is achieved, for example, by coupling a Zener diode (D1) serially to the control terminal. Where the input signal is of a kind which increases with a degree of uniformity, the time required to exceed that threshold will correspond to the desired delay. Thus, the driver circuit can match the dynamic range of the input signal automatically.

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