Abstract:
A bridge connected between a first bus and a second bus is configured in a computer system. The bridge includes a first chip connected to the first bus and a second chip connected to the second bus. The first chip communicates with the second chip over a communications channel. The first chip is configured with a first configuration transaction. The second chip is configured with a second configuration transaction which treats the communications channel as a third bus. The first bus and the second bus include a PCI bus, and the communications channel includes a cable bus.
Abstract:
A bridge connected between a first bus and a second bus is configured in a computer system. The bridge includes a first chip connected to the first bus and a second chip connected to the second bus. The first chip communicates with the second chip over a communications channel. The first chip is configured with a first configuration transaction. The second chip is configured with a second configuration transaction which treats the communications channel as a third bus. The first bus and the second bus include a PCI bus, and the communications channel includes a cable bus.