公开(公告)号：EP0821310A2

公开(公告)日：1998-01-28

申请号：EP97303795.5

申请日：1997-06-04

Applicant: Compaq Computer Corporation

Inventor： Goodrum, Alan L. ,  MacLaren, John M. ,  Pettey, Christopher J. ,  Culley, Paul R.

IPC: G06F13/364 ,  G06F13/40

CPC classification number: G06F13/364 ,  G06F13/4054

Abstract: A computer system includes a data storage device on a first data bus, a requesting device that initiates a delayed request on a second data bus, and a bridge device that delivers the delayed request to the first data bus and, after the requesting device regains control of the second data bus, begins providing data to the requesting device while the data storage device is providing the requested data to the bridge device.

Abstract translation: 计算机系统包括在第一数据总线上的数据存储装置，在第二数据总线上发起延迟请求的请求装置，以及将延迟的请求传送到第一数据总线的桥接装置，并且在请求装置重新获得控制之后 的第二数据总线开始向数据存储设备提供所请求的数据到桥设备时向请求设备提供数据。

公开(公告)号：EP0821310A3

公开(公告)日：1999-02-10

申请号：EP97303795.5

申请日：1997-06-04

Applicant: Compaq Computer Corporation

Inventor： Goodrum, Alan L. ,  MacLaren, John M. ,  Pettey, Christopher J. ,  Culley, Paul R.

IPC: G06F13/364 ,  G06F13/40

CPC classification number: G06F13/364 ,  G06F13/4054

Abstract: A computer system includes a data storage device on a first data bus, a requesting device that initiates a delayed request on a second data bus, and a bridge device that delivers the delayed request to the first data bus and, after the requesting device regains control of the second data bus, begins providing data to the requesting device while the data storage device is providing the requested data to the bridge device.

公开(公告)号：EP0811927A2

公开(公告)日：1997-12-10

申请号：EP97303791.4

申请日：1997-06-04

Applicant: Compaq Computer Corporation

Inventor： MacLaren, John M. ,  Goodrum, Alan L.

IPC: G06F13/40

CPC classification number: G06F13/4036

Abstract: A computer system includes a first device on a first data bus, a second device on a second data bus, and a bridge device that delivers data transactions between the two devices. The bridge device includes an execution queue that stores only a higher priority transaction and transactions initiated before the higher priority transaction, and a controller that selects transactions from the execution queue to be completed on one of the data buses.

Abstract translation: 计算机系统包括第一数据总线上的第一设备，第二数据总线上的第二设备以及在两个设备之间传送数据事务的桥接设备。 桥接器件包括仅存储较高优先级事务的执行队列和在较高优先级事务之前启动的事务，以及从执行队列中选择要在其中一条数据总线上完成的事务的控制器。

公开(公告)号：EP0821310B1

公开(公告)日：2004-12-15

申请号：EP97303795.5

申请日：1997-06-04

Applicant: Compaq Computer Corporation

Inventor： Goodrum, Alan L. ,  MacLaren, John M. ,  Pettey, Christopher J. ,  Culley, Paul R.

IPC: G06F13/364 ,  G06F13/40

CPC classification number: G06F13/364 ,  G06F13/4054

公开(公告)号：EP0811927A3

公开(公告)日：1999-07-28

申请号：EP97303791.4

申请日：1997-06-04

Applicant: Compaq Computer Corporation

Inventor： MacLaren, John M. ,  Goodrum, Alan L.

IPC: G06F13/40

CPC classification number: G06F13/4036

Abstract: A computer system includes a first device on a first data bus, a second device on a second data bus, and a bridge device that delivers data transactions between the two devices. The bridge device includes an execution queue that stores only a higher priority transaction and transactions initiated before the higher priority transaction, and a controller that selects transactions from the execution queue to be completed on one of the data buses.

公开(公告)号：EP0811929A3

公开(公告)日：1999-02-10

申请号：EP97303794.8

申请日：1997-06-04

Applicant: Compaq Computer Corporation

Inventor： Goodrum, Alan L. ,  MacLaren, John M. ,  Pettey, Christopher J. ,  Chow, Raymond L.

IPC: G06F13/40

CPC classification number: G06F13/4045

Abstract: A bridge connected between a first bus and a second bus is configured in a computer system. The bridge includes a first chip connected to the first bus and a second chip connected to the second bus. The first chip communicates with the second chip over a communications channel. The first chip is configured with a first configuration transaction. The second chip is configured with a second configuration transaction which treats the communications channel as a third bus. The first bus and the second bus include a PCI bus, and the communications channel includes a cable bus.

公开(公告)号：EP0811929A2

公开(公告)日：1997-12-10

申请号：EP97303794.8

申请日：1997-06-04

Applicant: Compaq Computer Corporation

Inventor： Goodrum, Alan L. ,  MacLaren, John M. ,  Pettey, Christopher J. ,  Chow, Raymond L.

IPC: G06F13/40

CPC classification number: G06F13/4045

Abstract: A bridge connected between a first bus and a second bus is configured in a computer system. The bridge includes a first chip connected to the first bus and a second chip connected to the second bus. The first chip communicates with the second chip over a communications channel. The first chip is configured with a first configuration transaction. The second chip is configured with a second configuration transaction which treats the communications channel as a third bus. The first bus and the second bus include a PCI bus, and the communications channel includes a cable bus.

Abstract translation: 连接在第一总线和第二总线之间的桥被配置在计算机系统中。 桥包括连接到第一总线的第一芯片和连接到第二总线的第二芯片。 第一芯片通过通信信道与第二芯片通信。 第一个芯片配置了第一个配置事务。 第二芯片配置有将通信信道视为第三总线的第二配置事务。 第一总线和第二总线包括PCI总线，并且通信信道包括有线总线。