公开(公告)号：EP1791406A1

公开(公告)日：2007-05-30

申请号：EP06077047.6

申请日：2006-11-17

Applicant: Delphi Technologies, Inc.

Inventor： Chan, Su Liang ,  Nah, Chih Kai ,  Pan, Binghua ,  Schofield, Robert A. ,  Cheok, Cheng Gek ,  Chengalva, Mahesh K.

IPC: H05K3/30

CPC classification number: H05K3/303 ,  H05K1/0266 ,  H05K3/3452 ,  H05K2201/09909 ,  H05K2201/09936 ,  H05K2201/10727 ,  H05K2201/2036 ,  Y02P70/613

Abstract: A composite standoff is formed on a circuit board during the processing of the circuit board while an array of electrical circuit traces including contact pads are formed, portions of the electrical circuit traces are covered by a solder mask, and legend ink is applied to the circuit board for locating electronic components on the circuit board without any need for an additional step.

Abstract translation: 在电路板的处理期间在电路板上形成复合间隔，同时形成包括接触焊盘的电路迹线阵列，电路迹线的一部分被焊接掩模覆盖，并且将传说墨施加到电路 用于在电路板上定位电子元件，而无需额外的步骤。