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公开(公告)号：BR102013007061A2
公开(公告)日：2015-07-07
申请号：BR102013007061
申请日：2013-03-26
Applicant: GEN ELECTRIC
Inventor： KNOBLOCH AARON JAY , KASHYAP AVINASH SRIKRISHNAN , ANDARAWIS EMAD ANDARAWIS , MATHEWS HARRY KIRK JR
Abstract: Sistema elétrico. Trata-se de um método de formação de um conjunto de supressor de tensão transitória semicondutor (tvs) com intervalo por banda larga (200) e um sistema para um conjunto de supressor de tensão transitária (1vs) (200). O conjunto tvs inclui um componente de conexão (202) configurado para acoplar eletricamente um primeiro componente elétrico (204) a um segundo componente elétrico (206) localizado de forma remota a partir do primeiro componente elétrico através de um ou mais condutos elétricos (208) e um dispositivo supressor de tensão transitória (210) posicionado dentro do componente de conexão e acoplado eletricamente ao um ou mais condutos elétricos em que o dispositivo tvs inclui um material semicondutor com intervalo por banda larga.
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公开(公告)号：BR102014017885A2
公开(公告)日：2015-11-17
申请号：BR102014017885
申请日：2014-07-21
Applicant: GEN ELECTRIC
Inventor： KASHYAP AVINASH SRIKRISHNAN , LOSEE PETER ALMERN , SANDVIK PETER MICAH , ZHOU RUI
Abstract: conjunto semicondutor integrado e método para fazer um conjunto semicondutor integrado. trata-se de um conjunto semicondutor integrado de modo monolítico. o conjunto semicondutor inclui um substrato que inclui silicio (si), e o dispositivo semicondutor de nitreto de gálio (gan) é fabricado sobre o substrato. o conjunto semicondutor inclui adicionalmente pelo menos uma estrutura de supressor de voltagem transitória (tvs) fabricado dentro ou sobre o substrato, em que a estrutura de tvs está em contato elétrico com o dispositivo semicondutor de gan. a estrutura de tvs é configurada para operar em um modo de atravessamento, um modo de avalanche, ou combinações dos mesmos, quando uma voltagem aplicada por todo o dispositivo semicondutor de gan é maior que uma voltagem de limiar. métodos para fazer um conjunto semicondutor integrado de modo monolítico também são apresentados.
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公开(公告)号：FR3009131B1
公开(公告)日：2019-11-22
申请号：FR1457183
申请日：2014-07-25
Applicant: GEN ELECTRIC
Inventor： KASHYAP AVINASH SRIKRISHNAN , SANDVIK PETER MICAH , ZHOU RUI , LOSEE PETER ALMERN
IPC: H01L23/58
Abstract: Un système à semiconducteurs à intégration monolithique (100) est présenté. Le système à semiconducteurs. (100) comporte un substrat (110) contenant du silicium (Si), et un composant semiconducteur à base de nitrure de gallium (GaN) est construit sur le substrat (110). Le système à semiconducteurs (100) comporte en outre au moins une structure de suppression de tensions transitoires (STT) (130) construite dans ou sur le substrat (110), la structure de STT (130) étant électriquement au contact (140) du composant semiconducteur à base de GaN (120). La structure de STT (130) est conçue pour fonctionner en mode pénétration, en mode avalanche ou dans des modes combinant ces deux derniers quand une tension appliquée dans le composant semiconducteur à base de GaN (120) dépasse une tension de seuil. Des procédés pour fabriquer un système à semiconducteurs à intégration monolithique (100) sont également présentés.
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公开(公告)号：FR3009131A1
公开(公告)日：2015-01-30
申请号：FR1457183
申请日：2014-07-25
Applicant: GEN ELECTRIC
Inventor： KASHYAP AVINASH SRIKRISHNAN , SANDVIK PETER MICAH , ZHOU RUI , LOSEE PETER ALMERN
IPC: H01L23/58
Abstract: Un système à semiconducteurs à intégration monolithique (100) est présenté. Le système à semiconducteurs. (100) comporte un substrat (110) contenant du silicium (Si), et un composant semiconducteur à base de nitrure de gallium (GaN) est construit sur le substrat (110). Le système à semiconducteurs (100) comporte en outre au moins une structure de suppression de tensions transitoires (STT) (130) construite dans ou sur le substrat (110), la structure de STT (130) étant électriquement au contact (140) du composant semiconducteur à base de GaN (120). La structure de STT (130) est conçue pour fonctionner en mode pénétration, en mode avalanche ou dans des modes combinant ces deux derniers quand une tension appliquée dans le composant semiconducteur à base de GaN (120) dépasse une tension de seuil. Des procédés pour fabriquer un système à semiconducteurs à intégration monolithique (100) sont également présentés.
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5.发明专利
公开(公告)号：CA2810063C
公开(公告)日：2020-05-19
申请号：CA2810063
申请日：2013-03-21
Applicant: GEN ELECTRIC
Inventor： KNOBLOCH AARON JAY , ANDARAWIS EMAD ANDARAWIS , MATHEWS HARRY KIRK , KASHYAP AVINASH SRIKRISHNAN
Abstract: A method of forming a wide band-gap semiconductor transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a connecting component configured to electrically couple a first electrical component to a second electrical component located remotely from the first electrical component through one or more electrical conduits and a transient voltage suppressor device positioned within the connecting component and electrically coupled to the one or more electrical conduits wherein the TVS device includes a wide band-gap semiconductor material.
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Patent Agency Ranking
公开(公告)号：CA2856490C
公开(公告)日：2018-02-13
申请号：CA2856490
申请日：2014-07-10
Applicant: GEN ELECTRIC
Inventor： KASHYAP AVINASH SRIKRISHNAN , SANDVIK PETER MICAH , ZHOU RUI , LOSEE PETER ALMERN
Abstract: A monolithically integrated semiconductor assembly is presented. The semiconductor assembly includes a substrate including silicon (Si), and gallium nitride (GaN) semiconductor device is fabricated on the substrate. The semiconductor assembly further includes at least one transient voltage suppressor (TVS) structure fabricated in or on the substrate, wherein the TVS structure is in electrical contact with the GaN semiconductor device. The TVS structure is configured to operate in a punch- through mode, an avalanche mode, or combinations thereof, when an applied voltage across the GaN semiconductor device is greater than a threshold voltage. Methods of making a monolithically integrated semiconductor assembly are also presented.
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公开(公告)号：DE102015116651A1
公开(公告)日：2016-04-07
申请号：DE102015116651
申请日：2015-10-01
Applicant: GEN ELECTRIC
IPC: H01L29/86
Abstract: Es sind eine Vorrichtung (100) zur Unterdrückung transienter Spannungen (TVS-Vorrichtung) und ein Verfahren zum Herstellen der Vorrichtung (100) geschaffen. Die TVS-Vorrichtung (100) enthält eine erste Schicht (104) eines Halbleitermaterials mit großer Bandlücke, die aus einem Material von einem ersten Leitfähigkeitstyp gebildet ist, eine zweite Schicht (106) eines Halbleitermaterials mit großer Bandlücke, die aus einem Material von einem zweiten Leitfähigkeitstyp über wenigstens einem Abschnitt der ersten Schicht (104) gebildet ist, wobei die zweite Schicht eine erste Dotierstoffkonzentration aufweist. Die TVS-Vorrichtung enthält ferner eine dritte Schicht (108) eines Halbleitermaterials mit großer Bandlücke, die aus dem Material von dem zweiten Leitfähigkeitstyp über wenigstens einem Abschnitt der zweiten Schicht (106) ausgebildet ist, wobei die dritte Schicht eine zweite Dotierstoffkonzentration enthält, wobei die zweite Dotierstoffkonzentration sich von der ersten Dotierstoffkonzentration unterscheidet. Die TVS-Vorrichtung enthält ferner eine vierte Schicht (110) eines Halbleitermaterials mit großer Bandlücke, die aus dem Material von dem ersten Leitfähigkeitstyp über wenigstens einem Abschnitt der dritten Schicht (108) ausgebildet ist.
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公开(公告)号：CA2856490A1
公开(公告)日：2015-01-25
申请号：CA2856490
申请日：2014-07-10
Applicant: GEN ELECTRIC
Inventor： KASHYAP AVINASH SRIKRISHNAN , SANDVIK PETER MICAH , ZHOU RUI , LOSEE PETER ALMERN
Abstract: A monolithically integrated semiconductor assembly is presented. The semiconductor assembly includes a substrate including silicon (Si), and gallium nitride (GaN) semiconductor device is fabricated on the substrate. The semiconductor assembly further includes at least one transient voltage suppressor (TVS) structure fabricated in or on the substrate, wherein the TVS structure is in electrical contact with the GaN semiconductor device. The TVS structure is configured to operate in a punch-through mode, an avalanche mode, or combinations thereof, when an applied voltage across the GaN semiconductor device is greater than a threshold voltage. Methods of making a monolithically integrated semiconductor assembly are also presented.
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公开(公告)号：BR102012025930A2
公开(公告)日：2014-03-18
申请号：BR102012025930
申请日：2012-10-10
Applicant: GEN ELECTRIC
Inventor： KASHYAP AVINASH SRIKRISHNAN , SHADDOCK DAVID MULFORD , SANDVIK PETER MICAH , ARTHUR PSTEPHEN DALEY , TILAK VINAYAK
Abstract: A method of forming a silicon carbide transient voltage suppressor (TVS) assembly (218) and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die (302) in a mesa structure that includes a first layer (306) of a first wide band gap semiconductor having a conductivity of a first polarity, a second layer (308) of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with the first layer wherein the second polarity is different than the first polarity. The TVS assembly also includes a third layer (312) of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with the second layer. The layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity.
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10.发明专利
公开(公告)号：CA2810063A1
公开(公告)日：2013-09-30
申请号：CA2810063
申请日：2013-03-21
Applicant: GEN ELECTRIC
Inventor： KNOBLOCH AARON JAY , ANDARAWIS EMAD ANDARAWIS , MATHEWS HARRY KIRK JR , KASHYAP AVINASH SRIKRISHNAN
Abstract: A method of forming a wide band-gap semiconductor transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a connecting component configured to electrically couple a first electrical component to a second electrical component located remotely from the first electrical component through one or more electrical conduits and a transient voltage suppressor device positioned within the connecting component and electrically coupled to the one or more electrical conduits wherein the TVS device includes a wide band-gap semiconductor material.
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