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公开(公告)号:EP4421872A1
公开(公告)日:2024-08-28
申请号:EP23204516.1
申请日:2023-10-19
Applicant: GlobalFoundries U.S. Inc.
Inventor: Pandey, Shesh Mani , Shanbhag, Kaustubh , Krishnasamy, Rajendran , Holt, Judson R.
IPC: H01L29/06 , H01L29/78 , H01L21/336 , H01L29/16
CPC classification number: H01L29/7835 , H01L29/66659 , H01L29/0653 , H01L29/0692 , H01L29/665 , H01L29/16
Abstract: Disclosed are embodiments of a structure including a semiconductor layer and a device, which has a well region within the semiconductor layer and at least one porous region within and shallower in depth than the well region. In some embodiments, the device can be a field effect transistor (FET) (e.g., a laterally diffused metal oxide semiconductor field effect transistor (LDMOSFETs)) with a drain drift region that extends through the well region around the porous region(s) to a drain region. The porous region(s) can modify the electric field in this drain drift region, thereby improving device performance. Embodiments can vary with regard to the number, size, shape, configuration, etc. of the porous region(s) within the well region. Also disclosed herein are method embodiments for forming the semiconductor structure.
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公开(公告)号:EP4398296A1
公开(公告)日:2024-07-10
申请号:EP23202611.2
申请日:2023-10-10
Applicant: GlobalFoundries U.S. Inc.
Inventor: Pandey, Shesh M. , Nath, Anindya , Loiseau, Alain F. , Mitra, Souvick , Tan, Chung F. , Holt, Judson R.
IPC: H01L23/525 , H01L23/34 , G11C17/16 , H01L27/06 , H10B20/00
CPC classification number: H01L23/5256 , H01L23/345 , H10B20/00 , G11C17/16 , H01L27/0629
Abstract: A structure includes: an electrically programmable fuse (e-fuse) including an anode and a cathode; at least one transistor positioned adjacent the e-fuse; and an electrically conductive interconnect coupling the cathode of the e-fuse to the at least one transistor, wherein the at least one transistor includes at least one semiconductor fin extending perpendicularly to the e-fuse.
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公开(公告)号:EP4210110A1
公开(公告)日:2023-07-12
申请号:EP22206418.0
申请日:2022-11-09
Applicant: GlobalFoundries U.S. Inc.
Inventor: Yu, Hong , Derrickson, Alexander M. , Holt, Judson R.
IPC: H01L29/417 , H01L29/78 , H01L21/8234 , H01L21/84 , H01L29/06 , H01L29/66 , H01L29/73 , H01L21/8238 , H01L21/8222 , H01L21/8249
Abstract: A bipolar transistor structure comprising a semiconductor fin on a substrate, the semiconductor fin having a first doping type, a length in a first direction, and a width in a second direction perpendicular to the first direction; a first emitter/collector material adjacent a first sidewall of the semiconductor fin along the width of the semiconductor fin, the first emitter/collector material having a second doping type opposite the first doping type; and
a second emitter/collector material adjacent a second sidewall of the semiconductor fin along the width of the semiconductor fin, the second emitter/collector material having the second doping type, wherein a width of the first emitter/collector material is different from a width of the second emitter/collector material.-
公开(公告)号:EP4394464A1
公开(公告)日:2024-07-03
申请号:EP23204763.9
申请日:2023-10-20
Applicant: GlobalFoundries U.S. Inc.
Inventor: Silverstein, Laura J. , Shank, Steven M. , Holt, Judson R. , Bian, Yusheng
Abstract: Disclosed are a structure with a substrate-embedded waveguide and a method of forming the structure. The waveguide includes cladding material lining a trench in a substrate, a core in the trench on the cladding material, and at least one cavity within the core. Each cavity extends from one end of the core toward the opposite end and contains a low refractive index material or is under vacuum so the waveguide is an arrow waveguide. An insulator layer is on the substrate and extends laterally over the waveguide and a semiconductor layer is on the insulator layer. Additionally, depending upon the embodiment, an additional waveguide can be aligned above the substrate-embedded waveguide either on the isolation region or on a waveguide extender that extends at least partially through the isolation region and the insulator layer to the waveguide.
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公开(公告)号:EP4243056A1
公开(公告)日:2023-09-13
申请号:EP22201123.1
申请日:2022-10-12
Applicant: GlobalFoundries U.S. Inc.
Inventor: Yu, Hong , Holt, Judson R. , Jain, Vibhor
IPC: H01L21/331 , H01L29/737 , H01L29/10 , H01L29/73 , H01L29/735
Abstract: A lateral bipolar transistor (10) on an SOI substrate (12a, 12b, 12c) comprising: a base (16) formed within the semiconductor substrate (12c); a thermal conductive material (12d') under the base and extending to an underlying semiconductor material (15); an emitter (22) on a first side of the base (16); and a collector (24) on a second side of the base (16).
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公开(公告)号:EP4216280A1
公开(公告)日:2023-07-26
申请号:EP22199933.7
申请日:2022-10-06
Applicant: GlobalFoundries U.S. Inc.
Inventor: Pandey, Shesh Mani , Derrickson, Alexander M. , Holt, Judson R. , Jain, Vibhor
Abstract: A structure, in particular a vertical bipolar transistor, comprising: an intrinsic base region comprising doped semiconductor material (12c), preferably formed from an SOI layer; a collector region (22, 22a) confined within an insulator material (12b) beneath the doped semiconductor material (12c); an emitter region (28) above the intrinsic base region; and an extrinsic base (26) region above the intrinsic base region. Air gaps (24) may be present underneath the collector, which is typically formed in the buried oxide (12b) of an SOI substrate (12a, b, c).
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