公开(公告)号：EP4443518A1

公开(公告)日：2024-10-09

申请号：EP23198431.1

申请日：2023-09-20

Applicant: GlobalFoundries U.S. Inc.

Inventor： HOLT, Judson R. ,  PEKARIK, John J. ,  NATH, Anindya ,  MITRA, Souvick

IPC: H01L29/737 ,  H01L21/331 ,  H01L29/06 ,  H01L29/87 ,  H01L29/78

CPC classification number: H01L29/7371 ,  H01L29/66242 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/87 ,  H01L29/78 ,  H01L29/66628 ,  H01L29/1054 ,  H01L29/32

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to low capacitance, low resistance devices and methods of manufacture. The structure includes: a semiconductor substrate; a device having an active region; and a porous semiconductor material within the semiconductor substrate and surrounding the active region of the device.

公开(公告)号：EP4553902A1

公开(公告)日：2025-05-14

申请号：EP24172309.7

申请日：2024-04-25

Applicant: GlobalFoundries U.S. Inc.

Inventor： NATH, Anindya ,  RAGHUNATHAN, Uppili S. ,  KRISHNASAMY, Rajendran ,  KARALKAR, Sagar Premnath ,  DERRICKSON, Alexander M. ,  JAIN, Vibhor

IPC: H01L27/02 ,  H01L29/66 ,  H01L29/74

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a silicon control rectifier (SCR) and methods of manufacture. The structure includes: a doped region in a semiconductor substrate; at least two regions of semiconductor material comprising opposite doping types over the doped region; and polysilicon regions over respective ones of the least two regions of semiconductor material.

公开(公告)号：EP4428924A1

公开(公告)日：2024-09-11

申请号：EP24152505.4

申请日：2024-01-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： PANDEY, Shesh Mani ,  KARALKAR, Sagar Premnath ,  KRISHNASAMY, Rajendran ,  NATH, Anindya

IPC: H01L29/06 ,  H01L21/329 ,  H01L29/87

CPC classification number: H01L29/0649 ,  H01L29/87 ,  H01L29/66121

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high performance silicon controlled rectifier (SCR) devices and methods of manufacture. The structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate, adjacent to the first well; a plurality of shallow trench isolation structures extending into the first well and the second well; and a deep trench isolation structure between the plurality of shallow trench isolation structures and extending into the semiconductor material deeper than the plurality of shallow trench isolation structures.

公开(公告)号：EP4340026A1

公开(公告)日：2024-03-20

申请号：EP23188284.6

申请日：2023-07-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： NATH, Anindya ,  LOISEAU, Alain F. ,  MITRA, Souvick

IPC: H01L27/02 ,  H01L27/12 ,  H01L29/87

Abstract: The present disclosure relates to a structure including a trigger element within a semiconductor-on-insulator (SOI) substrate, and a silicon controlled rectifier (SCR) under a buried insulator layer of the SOI substrate. The trigger element is between an anode and a cathode of the SCR.