公开(公告)号：EP4369408A1

公开(公告)日：2024-05-15

申请号：EP23198686.0

申请日：2023-09-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： PANDEY, Shesh M. ,  KRISHNASAMY, Rajendran ,  HOLT, Judson R. ,  TAN, Chung Foong

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/407 ,  H01L29/0653 ,  H01L29/7835 ,  H01L29/404

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a transistor with a metal field plate contact and methods of manufacture. The structure includes: a gate structure (14) on a semiconductor substrate (12); a shallow trench isolation structure (18) within the semiconductor substrate; and a contact (22) extending from the gate structure and into the shallow trench isolation structure.

公开(公告)号：EP4421874A1

公开(公告)日：2024-08-28

申请号：EP24152507.0

申请日：2024-01-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： PANDEY, Shesh Mani ,  KARALKAR, Sagar Premnath ,  KRISHNASAMY, Rajendran ,  TAN, Chung Foong

IPC: H01L29/06 ,  H01L29/16 ,  H01L21/329 ,  H01L29/87

CPC classification number: H01L29/87 ,  H01L29/66121 ,  H01L29/0649 ,  H01L29/1604

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high performance silicon controlled rectifier (SCR) devices and methods of manufacture. The structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate, adjacent to the first well; and a porous semiconductor region extending in the first well and the second well.

公开(公告)号：EP4254505A1

公开(公告)日：2023-10-04

申请号：EP22198020.4

申请日：2022-09-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： ABOU-KHALIL, Michel ,  SHANK, Steven ,  VALLETT, Aaron ,  Mc TAGGART, Sarah ,  KRISHNASAMY, Rajendran

IPC: H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L21/336

Abstract: A structure comprising: a semiconductor substrate including a first surface, a first recess in the first surface, and a second surface inside the first recess; a shallow trench isolation region extending from the first surface into the semiconductor substrate, the shallow trench isolation region positioned to surround an active device region including the first recess; and a field-effect transistor including a gate electrode positioned on a portion of the second surface.

公开(公告)号：EP4379811A3

公开(公告)日：2024-09-04

申请号：EP23199260.3

申请日：2023-09-25

Applicant: GlobalFoundries U.S. Inc.

Inventor： SHARMA, Santosh ,  KRISHNASAMY, Rajendran ,  KANTAROVSKY, Johnatan A.

IPC: H01L29/778 ,  H01L21/337 ,  H01L29/06 ,  H01L29/40 ,  H01L29/10 ,  H01L29/20

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/1066 ,  H01L29/404 ,  H01L29/0657 ,  H01L29/66462

Abstract: Semiconductor structures and, more particularly, a high-electron-mobility transistor and methods of manufacture thereof are disclosed. The structure includes: a gate structure (18, 22, 28); and a channel region (14, 16) under the gate structure, the channel region having a first portion including a first thickness and a second portion having a second thickness greater than the first thickness, the second portion being positioned remotely from the gate structure.

公开(公告)号：EP4369396A1

公开(公告)日：2024-05-15

申请号：EP23198688.6

申请日：2023-09-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： PANDEY, Shesh M. ,  KRISHNASAMY, Rajendran ,  JAIN, Vibhor

IPC: H01L23/525 ,  G11C17/16 ,  H01L23/34 ,  H10B20/25

CPC classification number: H01L23/5256 ,  H10B20/25 ,  G11C17/16 ,  H01L23/345

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an e-fuse with metal fill structures and methods of manufacture. The structure includes: an insulator material; an e-fuse structure on the insulator material; a plurality of heaters on the insulator material and positioned on sides of the e-fuse structure; and conductive fill material within a space between the e-fuse structure and the plurality of heaters.

公开(公告)号：EP4365956A1

公开(公告)日：2024-05-08

申请号：EP23196430.5

申请日：2023-09-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： DUTTA, Anupam ,  KRISHNASAMY, Rajendran ,  CHOPPALLI, Vvss Satyasuresh ,  JAIN, Vibhor ,  GAUTHIER JR., Robert J.

IPC: H01L29/737 ,  H01L29/08 ,  H01L21/331

CPC classification number: H01L29/737 ,  H01L29/0821 ,  H01L29/66242

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a heterojunction bipolar transistor comprising a collector region, a base region and an emitter region; and at least one non-single-crystal semiconductor region in the collector region of the heterojunction bipolar transistor.

公开(公告)号：EP4553902A1

公开(公告)日：2025-05-14

申请号：EP24172309.7

申请日：2024-04-25

Applicant: GlobalFoundries U.S. Inc.

Inventor： NATH, Anindya ,  RAGHUNATHAN, Uppili S. ,  KRISHNASAMY, Rajendran ,  KARALKAR, Sagar Premnath ,  DERRICKSON, Alexander M. ,  JAIN, Vibhor

IPC: H01L27/02 ,  H01L29/66 ,  H01L29/74

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a silicon control rectifier (SCR) and methods of manufacture. The structure includes: a doped region in a semiconductor substrate; at least two regions of semiconductor material comprising opposite doping types over the doped region; and polysilicon regions over respective ones of the least two regions of semiconductor material.

公开(公告)号：EP4428924A1

公开(公告)日：2024-09-11

申请号：EP24152505.4

申请日：2024-01-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： PANDEY, Shesh Mani ,  KARALKAR, Sagar Premnath ,  KRISHNASAMY, Rajendran ,  NATH, Anindya

IPC: H01L29/06 ,  H01L21/329 ,  H01L29/87

CPC classification number: H01L29/0649 ,  H01L29/87 ,  H01L29/66121

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high performance silicon controlled rectifier (SCR) devices and methods of manufacture. The structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate, adjacent to the first well; a plurality of shallow trench isolation structures extending into the first well and the second well; and a deep trench isolation structure between the plurality of shallow trench isolation structures and extending into the semiconductor material deeper than the plurality of shallow trench isolation structures.

公开(公告)号：EP4235796A1

公开(公告)日：2023-08-30

申请号：EP22205699.6

申请日：2022-11-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： MC TAGGART, Sarah A. ,  KRISHNASAMY, Rajendran ,  LIU, Qizhi

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/732

Abstract: A semiconductor structure comprising: a dielectric layer (162); an emitter region (140) comprising: a first emitter portion (141) extending through the dielectric layer (162); and a second emitter portion (142) on the first emitter portion and further extending laterally onto the dielectric layer (162); and an additional dielectric layer (163) on the second emitter portion, wherein the dielectric layer (162), the second emitter portion (142), and the additional dielectric layer (163) are wider than the first emitter portion (141), and wherein at least a section of the second emitter portion (142) is narrower than the dielectric layer (162) and the additional dielectric layer (163). Preferably, the second emitter portion (142) increases in width between the dielectric layer (162) and the additional dielectric layer (163)

公开(公告)号：EP4550395A1

公开(公告)日：2025-05-07

申请号：EP24170682.9

申请日：2024-04-17

Applicant: GlobalFoundries U.S. Inc.

Inventor： DEANGELIS, Jacob M. ,  WILLS, Trevor S. ,  LEVY, Mark D. ,  PORTER, Spencer H. ,  CUCCI, Brett T. ,  KRISHNASAMY, Rajendran

IPC: H01L21/76 ,  H01L21/762

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to devices with isolation structures and methods of manufacture. The structure includes: a stack of semiconductor materials; a semiconductor substrate under the stack of semiconductor materials; a trench filled with in insulator material; and a damaged region of the stack of semiconductor materials extending from at least a bottom of the insulator material to the semiconductor substrate.