公开(公告)号：EP4550015A1

公开(公告)日：2025-05-07

申请号：EP24170916.1

申请日：2024-04-18

Applicant: GlobalFoundries U.S. Inc.

Inventor： BIAN, Yusheng ,  STRICKER, Andreas D. ,  ABOKETAF, Abdelsalam ,  HOLT, Judson R. ,  DEZFULIAN, Kevin K. ,  GIEWONT, Kenneth J. ,  DERRICKSON, Alexander ,  LEE, Won Suk ,  CHANDRAN, Sujith ,  SPORER, Ryan W. ,  LIN, Teng-Yin

IPC: G02B6/12 ,  G02B6/122

Abstract: Structures for a photonics chip that include a photodetector and methods of forming such structures. The structure comprises a photodetector that is disposed on a substrate and that includes a light-absorbing layer. The light-absorbing layer includes a sidewall and a notch in the sidewall. The structure further comprises a waveguide core including a section adjacent to the notch in the sidewall of the light-absorbing layer.

公开(公告)号：EP4276911A1

公开(公告)日：2023-11-15

申请号：EP22200713.0

申请日：2022-10-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： PANDEY, Shesh Mani ,  JAIN, Vibhor ,  HOLT, Judson R.

IPC: H01L29/08 ,  H01L21/331 ,  H01L29/737 ,  H01L29/10 ,  H01L29/417

Abstract: A structure comprising: a subcollector under a buried insulator layer; a collector above the subcollector; a base within the buried insulator layer; an emitter above the base; and contacts to the subcollector, the base and the emitter.

公开(公告)号：EP4369408A1

公开(公告)日：2024-05-15

申请号：EP23198686.0

申请日：2023-09-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： PANDEY, Shesh M. ,  KRISHNASAMY, Rajendran ,  HOLT, Judson R. ,  TAN, Chung Foong

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/407 ,  H01L29/0653 ,  H01L29/7835 ,  H01L29/404

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a transistor with a metal field plate contact and methods of manufacture. The structure includes: a gate structure (14) on a semiconductor substrate (12); a shallow trench isolation structure (18) within the semiconductor substrate; and a contact (22) extending from the gate structure and into the shallow trench isolation structure.

公开(公告)号：EP4213193A1

公开(公告)日：2023-07-19

申请号：EP22203386.2

申请日：2022-10-24

Applicant: GlobalFoundries U.S. Inc.

Inventor： HOLT, Judson R. ,  JAIN, Vibhor ,  JOHNSON, Jeffrey B. ,  PEKARIK, John J.

IPC: H01L21/763 ,  H01L29/737 ,  H01L21/762 ,  H01L29/08 ,  H01L29/66 ,  H01L29/732

Abstract: A bipolar transistor structure comprising: a polycrystalline isolation layer on or over a substrate; a collector layer over the polycrystalline isolation layer, the collector layer having a first doping type, wherein a lower surface of the collector layer physically interfaces with an upper surface of the polycrystalline isolation layer; a base layer on the collector layer, the base layer having a second doping type opposite the first doping type; and an emitter layer on the base layer, the emitter layer having the first doping type, wherein the material composition of the collector layer is different from a material composition of the base layer.

公开(公告)号：EP4156289A1

公开(公告)日：2023-03-29

申请号：EP22198490.9

申请日：2022-09-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： YU, Hong ,  JAIN, Vibhor ,  HOLT, Judson R.

IPC: H01L29/737 ,  H01L21/331 ,  H01L29/08

Abstract: A structure comprises: a base region (140) comprising a base layer (105); a buffer layer (108a) positioned laterally immediately adjacent to the base layer; and a collector region (120) comprising a collector layer (109a) positioned laterally immediately adjacent to the buffer layer, wherein the base layer, the buffer layer, and the collector layer comprise different semiconductor materials with different bandgap sizes.

公开(公告)号：EP4557376A1

公开(公告)日：2025-05-21

申请号：EP24181005.0

申请日：2024-06-10

Applicant: GlobalFoundries U.S. Inc.

Inventor： HOLT, Judson R. ,  KENNEY, Crystal R. ,  JAIN, Vibhor ,  PEKARIK, John J. ,  NAFARI, Mona ,  JOHNSON, Jeffrey B.

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/06

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to vertical heterojunction bipolar transistors and methods of manufacture. The structure includes: a sub-collector region; a collector region above the sub-collector region; an intrinsic base above the collector region; an emitter above the intrinsic base region; and an extrinsic base on the intrinsic base and adjacent to the emitter, wherein the collector region includes an undercut profile comprising lower inwardly tapered sidewalls and upper inwardly tapered sidewalls which extend to a narrow section between the sub-collector region and the base region.

公开(公告)号：EP4525048A1

公开(公告)日：2025-03-19

申请号：EP24160165.7

申请日：2024-02-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： DERRICKSON, Alexander M. ,  SHANBHAG, Kaustubh ,  JAIN, Vibhor ,  HOLT, Judson R.

IPC: H01L29/10 ,  H01L21/331 ,  H01L29/737 ,  H01L29/08 ,  H01L29/73 ,  H01L29/06

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to bipolar transistors and methods of manufacture. The structure includes: a collector; a base region above the collector; an emitter laterally connecting to the base region; and an extrinsic base connecting to the base region.

公开(公告)号：EP4383357A1

公开(公告)日：2024-06-12

申请号：EP23199267.8

申请日：2023-09-25

Applicant: GlobalFoundries U.S. Inc.

Inventor： DERRICKSON, Alexander ,  RAGHUNATHAN, Uppili S. ,  JAIN, Vibhor ,  BIAN, Yusheng ,  HOLT, Judson R.

IPC: H01L31/11 ,  H01L31/028 ,  H01L31/0352 ,  H01L31/0232 ,  H01L31/0224

CPC classification number: H01L31/1105 ,  H01L31/028 ,  H01L31/02327 ,  H01L31/035281 ,  H01L31/022408

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to lateral phototransistors and methods of manufacture. The structure includes a lateral bipolar transistor (12); and a T-shaped photosensitive structure (20) vertically above an intrinsic base (12d) of the lateral bipolar transistor.

公开(公告)号：EP4160695A1

公开(公告)日：2023-04-05

申请号：EP22198237.4

申请日：2022-09-28

Applicant: GlobalFoundries U.S. Inc.

Inventor： YU, Hong ,  HOLT, Judson R. ,  DERRICKSON, Alexander M.

IPC: H01L29/735 ,  H01L21/331 ,  H01L29/165 ,  H01L29/06 ,  H01L27/07 ,  H01L27/06 ,  H01L29/08 ,  H01L29/10

Abstract: Embodiments of the disclosure provide a bipolar transistor structure on a semiconductor fin. The semiconductor fin may be on a substrate and may have a first doping type, a length in a first direction, and a width in a second direction perpendicular to the first direction. The semiconductor fin includes a first portion and a second portion adjacent the first portion along the length of the semiconductor fin. The second portion is coupled to a base contact. A dopant concentration of the first portion is less than a dopant concentration of the second portion. An emitter/collector (E/C) material is adjacent the first portion along the width of the semiconductor fin. The E/C material has a second doping type opposite the first doping type. The E/C material is coupled to an E/C contact.

公开(公告)号：EP4496005A1

公开(公告)日：2025-01-22

申请号：EP24151998.2

申请日：2024-01-16

Applicant: GlobalFoundries U.S. Inc.

Inventor： PAWLAK, Bartlomiej J. ,  HOLT, Judson R.

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786 ,  H01L29/08 ,  H01L29/10

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to nanosheet transistor structures and methods of manufacture. The structure includes: a plurality of stacked semiconductor nanosheets over a semiconductor substrate; a plurality of gate structures surrounding individual nanosheets of the plurality of semiconductor nanosheets; an inner sidewall spacer adjacent each of the plurality of gate structures; and corner spacers under the plurality of stacked semiconductor nanosheets.