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    3.
    发明专利
    未知

    公开(公告)号：DE1589975A1

    公开(公告)日：1970-04-30

    申请号：DE1589975

    申请日：1967-10-26

    Applicant: IBM

    Inventor： PHILIP CASTRUCCI PAUL ,  WITT DAVID DE ,  ABHIMANYU DHAKA VIR ,  EDWARD MUTTER WALTER

    IPC: H01L21/00 ,  H01L21/331 ,  H01L23/485 ,  H01L29/00 ,  H01L5/06

    Abstract: 1,174,832. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 2 Oct., 1967 [27 Oct., 1966], No. 44711/67. Heading H1K. [Also in Division C7] A method of forming an elongated metal contact on a semi-conductor device comprises; (a) providing a protective coating, preferably of silicon dioxide or silicon nitride, on the semiconductor surface and forming at least one elongated aperture in the coating; (b) depositing a first layer of metal, preferably Pt, Pd or Mo, over the protective coating and the exposed semi-conductor surface to form an ohmic contact with the semi-conductor; (c) removing the metal from the protective coating; (d) depositing, e.g. by electroplating or by chemical or electroless deposition, a second layer of metal, preferably palladium, over the first layer within the aperture to increase the conductivity of the contact; and (e) depositing a third layer of metal over the protective coating to form an external hand pattern having an extension overlaying a portion only of the second layer. The third layer may consist of Al, Mo or a sandwich of Cu-Mo, Cr-Cu, Mo-Cu or Mo-Au.

    4.
    发明专利
    未知

    公开(公告)号：DE1764313B1

    公开(公告)日：1972-05-25

    申请号：DE1764313

    申请日：1968-05-15

    Applicant: IBM

    Inventor： BARSON FRED ,  ABHIMANYU DHAKA VIR

    IPC: H01L21/00 ,  H01L23/29 ,  H01L7/44

    Abstract: 1,194,113. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 7 May, 1968 [18 May, 1967], No. 21553/68. Heading H1K. A method of fabricating a transistor having a complex base region of relatively active and relatively inactive parts comprises defining, by means of an aperture in an insulating layer 11 of silicon dioxide on a semi-conductor substrate 10 containing an impurity of the one type conductivity, that part where the complex base is to be, and forming on the exposed substrate surface, over that part which is to be the relatively inactive base region, a layer 15 of silicon dioxide doped with an impurity of the opposite type conductivity to leave uncovered that part 14 where the relatively active base region is to be. The coated substrate 10 is then heated to diffuse the impurity from the layer 15 into the substrate to form the relatively inactive base region 16. Then a further impurity of the opposite type conductivity is diffused through the uncovered portion 14 to form the relatively active base region 17. Finally an impurity of the one type conductivity is diffused through the same portion 14 to a lesser depth to form the emitter 18.

    5.
    发明专利
    未知

    公开(公告)号：DE1932590A1

    公开(公告)日：1970-07-16

    申请号：DE1932590

    申请日：1969-06-27

    Applicant: IBM

    Inventor： ABHIMANYU DHAKA VIR

    IPC: H01L21/00 ,  H01L21/82 ,  H01L27/06 ,  H01L27/07 ,  H01L19/00

    Abstract: 1,253,902. Schottky diodes. INTERNATIONAL BUSINESS MACHINES CORP. 25 June, 1969 [27 June, 1968], No. 31974/69. Heading H1K. A Schottky diode comprises a substrate carrying an epitaxial layer of one conductivity type less than 2À5Á thick and doped to an extent of less than 5 x 10 16 atoms/c.c. A heavily doped inclusion of the same type is formed in the layer adjacent its interface with the substrate, and the Schottky contact on the layer opposite the inclusion. An integrated circuit comprising such a diode connected across the collector junction of a transistor is formed as illustrated in Fig. 1. N+ regions are formed in a 15 ohm./ cm. P type silicon substrate by oxide-masked diffusion and extended upwards by heating the subsequently deposited epitaxial layer 13. Then in successive masked diffusions transistor base zone 20, P+ isolation walls 18, 19, N+ surface contact regions 16, 17 and emitter zone 22 are formed. Next a silicon oxide or nitride passivating layer 23 is apertured as shown and platinum vapour deposited overall. After heating to alloy it in the apertures unalloyed platinum is etched away and a further thicker layer of aluminium or molybdenum deposited overall and pattern etched to form the connections shown to the emitter, between the transistor base and diode anode 20, 28a and between the transistor collector and diode cathode 14, 15. If the Schottky diode is required to have a higher forward voltage threshold its aperture is formed immediately before deposition of the molybdenum. The deposited cathode-collector connection and isolation walls are dispensed with in a simpler arrangement where N+ inclusions 14, 15 are combined into a single region. Alternative Schottky contact materials are palladium, chromium, molybdenum and nickel and these may be deposited and the aperture for the contact formed by low temperature RF sputtering. Details of certain conventional processing steps are disclosed.

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