公开(公告)号：JP2005197685A

公开(公告)日：2005-07-21

申请号：JP2004370239

申请日：2004-12-21

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ALLER INGO ,  GERNHOEFER VEIT ,  KEINERT JOACHIM ,  LUDWIG THOMAS

IPC: G03F1/08 ,  G06F17/50 ,  H01L21/336 ,  H01L21/82 ,  H01L21/8234 ,  H01L27/04 ,  H01L27/08 ,  H01L27/088 ,  H01L29/786

CPC classification number: H01L29/785 ,  G06F17/5068 ,  H01L21/823821 ,  H01L29/66795

Abstract: PROBLEM TO BE SOLVED: To provide a reliable method and a device which enable design-keeping transition from an existing non-fin design structure to a functionally identical structure based on a technology of a double-gate fin-base field-effect transistor FinFET in a metal-oxide semiconductor MOS, a device of a complementary metal-oxide semiconductor CMOS, and designing chips of the semiconductors. SOLUTION: The corresponding cell structure "C" 512 contains an arrangement of a cell structure "A" and a cell structure "B" that include no previously generated fins. Consideration is made on arrangement combinations of a cell structure "A" and a cell structure "B" generated in this design hierarchy to other cell structures. A fin generation tool decides not to arrange the fins in the cell structure "A" and cell structure "B" in this hierarchy. The fin generation is delegated to the hierarchy, thus revealing a combined fin shape 560 without steps as indicated by a circle. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种可靠的方法和装置，其使得能够基于双栅极鳍基场场效应技术将设计保持从现有非鳍设计结构转换到功能相同的结构 金属氧化物半导体MOS中的晶体管FinFET，互补金属氧化物半导体CMOS的器件，以及半导体的芯片的设计。 解决方案：相应的单元结构“C”512包含单元结构“A”和单元结构“B”的布置，其不包括先前生成的散热片。 考虑在该设计层级中生成的单元结构“A”和单元结构“B”与其它单元结构的组合。 翅片生成工具决定不将散热片排列在该层次结构中的单元结构“A”和单元结构“B”。 翅片一代被委托给层级，从而显示出一个组合的翅片形状560，没有由圆圈指示的步骤。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：AT403937T

公开(公告)日：2008-08-15

申请号：AT04707026

申请日：2004-01-30

Applicant: IBM

Inventor： RAINEY BETH ,  NOWAK EDWARD ,  ALLER INGO ,  KEINERT JOACHIM ,  LUDWIG THOMAS

IPC: H01L21/84 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/12 ,  H01L29/04 ,  H01L29/786

Abstract: The present invention provides a FinFET device that has a first fin and a second fin. Each fin has a channel region and source and drain regions that extend from the channel region. The fins have different heights. The invention has a gate conductor positioned adjacent the fins. The gate conductor runs perpendicular to the fins and crosses the channel region of each of the first fin and second fin. The fins are parallel to one another. The ratio of the height of the first fin to the height of the second fin comprises a ratio of one to 2/3. The ratio is used to tune the performance of the transistor and determines the total channel width of the transistor.