-
公开(公告)号:JPH01260922A
公开(公告)日:1989-10-18
申请号:JP29112088
申请日:1988-11-19
Applicant: IBM
Inventor: ERUBUE BERENGAA , ARUMAN BURUNAN , BURONO KAPURIE , JIYANNPOORU RUSOO
IPC: H03K3/289 , H03K19/0185 , H03K19/086 , H03K19/173
Abstract: PURPOSE: To recover the level of an upper stage for each circuit input and to add an AND logic function to each input when diodes having their anodes connected are used by connecting at least one level shifter element (converter) such as a diode to an input transistor(TR). CONSTITUTION: A circuit 30 comprises, as a basic constitution, cascaded current switches 31 and 32 and one converter or output stages 33 and 34 per unit output. The current switch 31 comprises input TRs TX31 and TX32 connected to a differential amplifier having a reference TR TX33, thereby forming a lower stage 36. Similar constitution is used for the upper stage. In the upper stage 37, diodes SBD31 to SBD33 and a resistance RD31 are so combined as to execute an AND function, and connected to the base of the input TR TX34. Further, SBDs34 and 35 and a resistance RD32 are also combined so as to execute an AND function, and connected to the input TR TX35. This is AND (or OR) of ANDOR at the upper stage level and combined with OR at the lower-stage level.
-
公开(公告)号:JPS6098600A
公开(公告)日:1985-06-01
申请号:JP14982084
申请日:1984-07-20
Applicant: IBM
Inventor: ERUBE BERANSHIE , ARUMAN BURUNAN , JIYANNPOORU RUSOO
-
公开(公告)号:JPS6046619A
公开(公告)日:1985-03-13
申请号:JP9893884
申请日:1984-05-18
Applicant: IBM
Inventor: ARUMAN BURUNAN , BERUNAARU DONI , JIERAARU BUDON , PIEERU MORIE , FUIRITSUPU SUTOTSUPA
IPC: H01L21/822 , H01L21/82 , H01L27/04 , H01L27/06 , H03K19/003 , H03K19/082 , H03K19/084 , H03K19/088
-
-