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    BI-CMOS LOGIC CIRCUIT
    1.
    发明专利
    BI-CMOS LOGIC CIRCUIT 失效

    公开(公告)号：JPH02268515A

    公开(公告)日：1990-11-02

    申请号：JP5391390

    申请日：1990-03-07

    Applicant: IBM

    Inventor： JIERAARU BUDON ,  PIEERU MORIE ,  JIYAN POORU NIITSU ,  ENGU ONGU ,  PASUKARU TANOFU ,  FURANKU WARAARU

    IPC: H03K17/567 ,  H03K5/007 ,  H03K19/013 ,  H03K19/0175 ,  H03K19/08 ,  H03K19/0944

    Abstract: PURPOSE: To attain a maximum swing providing a desired CMOS compatibility to a BICMOS logic circuit by connecting an interface circuit means to an output terminal of the BICMOS logic circuit. CONSTITUTION: An interface circuit C1 executing the same logic function of a BICMOS circuit 11 such as an AND function is connected to a terminal 15 of the circuit 11. The interface circuit C1 includes 4 FETs, 2 NFETs N6, N7 and 2 PFETs, P3, P4. The interface circuit C1 operated even singly provide desired heavy load drive capability to the BICMOS circuit 11 and gives a maximum voltage swing required for the CMOS/BICMOS compatibility. Thus, the improved BICMOS circuit is formed by the combination of the circuit 11 and the interface circuit C1 with an excellent characteristic and the compatibility with the CMOS is attained.

    DIFFERENTIAL CASCODE CURRENT SWITCH LOGIC CIRCUIT
    4.
    发明专利
    DIFFERENTIAL CASCODE CURRENT SWITCH LOGIC CIRCUIT 失效

    公开(公告)号：JPH0365818A

    公开(公告)日：1991-03-20

    申请号：JP19088390

    申请日：1990-07-20

    Applicant: IBM

    Inventor： JIERAARU BUDON

    IPC: H03M1/74 ,  H03K3/286 ,  H03K19/086 ,  H03K19/173 ,  H03K19/21

    Abstract: PURPOSE: To obtain an extension library of differential cascode current switch(DCCS) logical circuit by providing a logical input device which executes transmission in a common emitter node where first and second functions are summed-up. CONSTITUTION: Diodes D431 and D432 connected to a register at the left side of a logical tree 41 form an AND gate which is driven by the combination of in-phase binary logical input signals Z41 and Z42. The output signals are given to the base of a transistor TX431 so that it is utilized together with a polarity in the common emitter node CN43 of the transistors TX431, TX432 and TX433. Besides, the transistors TX432 and TX433 are driven by out-of phase signals (-)Z41 and (-)Z42 which are respectively given to their bases and out-of phase input signals are summed-up in the node CN43 through the OR doting of the transistor TX432 and TX433. Thus, the number of logical functions are increased.

    COMPLEMENTARY EMITTER FOLLOWER DRIVER
    5.
    发明专利
    COMPLEMENTARY EMITTER FOLLOWER DRIVER 失效

    公开(公告)号：JPH02268016A

    公开(公告)日：1990-11-01

    申请号：JP5288890

    申请日：1990-03-06

    Applicant: IBM

    Inventor： JIERAARU BUDON ,  PIEERU MORIE ,  SEIKI OGURA ,  DOMINIIKU OME ,  PASUKARU TANOFU ,  FURANKU WARAARU

    IPC: H03K19/086 ,  H03F1/30 ,  H03F3/30 ,  H03K17/56 ,  H03K17/567 ,  H03K17/66 ,  H03K19/01 ,  H03K19/013 ,  H03K19/018 ,  H03K19/08

    Abstract: PURPOSE: To quicken the operating speed and to reduce current consumption by providing a voltage converter circuit between NPN and PNP output transistors(TRs), selecting a DC voltage shift to be a shift to warrant both a minimum crossover current and a minimum delay and setting the shift point to be an operating point. CONSTITUTION: Two output bipolar TRs, an upper NPNT 1 and a lower PNPT 2 are connected by a common coupling node N and a 1st power supply voltage VH and a 2nd power supply voltage GND are given to both ends of the TRs T1, T2. The output node N is connected to a terminal 15, at which an output signal VOUT is available and a voltage conversion circuit SA1 is placed between a base and a node of each TR. Then the base node is driven by a logic signal IN 1 fed from a preceding drive circuit and the complementary emitter follower driver is operated at a conduction limit independently of a threshold level of the TRs.

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