公开(公告)号：JPH0793183A

公开(公告)日：1995-04-07

申请号：JP19943493

申请日：1993-08-11

Applicant: IBM

Inventor： ARAN IAN ARUPAATO ,  KAARU EDOWAADO KURAAKU ,  MAIKERU HENRI TEODOA HATSUKU ,  KIYASUPAA ANSONII SUKARUJI ,  AARU JIEI SHIYUMARUTSU ,  BAASUKAA SHINHA

IPC: G06F11/28 ,  G06F9/40 ,  G06F11/36

Abstract: PURPOSE: To provide a dynamic execution link between a uniquely controlled hook instruction and an analysis program. CONSTITUTION: A new dynamic execution link excludes the participation of an OS to a hook operation and excludes interruption used for linking the OS to the execution of the hook instruction. Thus, the dynamic execution link provides non-interruption connection from respective usable hook instructions to the analysis program 16 and the non-interruption connection from the analysis program 16 to a hooked program 10.

公开(公告)号：JPH0683710A

公开(公告)日：1994-03-25

申请号：JP691593

申请日：1993-01-19

Applicant: IBM

Inventor： KAARU EDOWAADO KURAAKU ,  JIEFUREI ARAN FUREI ,  KENESU AANESUTO PURAMUBETSUKU ,  KIYASUPAA ANSONII SUKARUZUI ,  BAASUKAA SHINHA

IPC: G06F12/10 ,  G06F9/30 ,  G06F9/32 ,  G06F9/38 ,  G06F9/46

Abstract: PURPOSE: To provide an efficient inter-space branch process to separated programs in different address spaces in a group of related address spaces of a subsystem. CONSTITUTION: The group has a fundamental space and at least one partial space, and each partial space can include a program and data, which cannot be accessed from other partial spaces, to separate the program and data in a subsystem. Any CPU in a computer system can designate programs found in address spaces. A designating process checks authority for access to the group of a user of the group and executes an intra-group program call instruction which designates first and second general registers.

公开(公告)号：JPH05210570A

公开(公告)日：1993-08-20

申请号：JP22427592

申请日：1992-08-24

Applicant: IBM

Inventor： RICHIYAADO AAUIN BAUMU ,  BURENTO AREN KAARUSON ,  MUUN JIYU KIMU ,  MAIKERU JIERAADO MOORU ,  KIYASUPAA ANSONII SUKARUJI ,  BAASUKAA SHINHA

IPC: G06F9/32 ,  G06F9/355 ,  G06F12/02 ,  G06F12/06

Abstract: PURPOSE: To provide a method for extending the size (maximum 31 bits) of a small address so that data or the like can be arranged in any place in an extremely large memory (beyond the 31st power of 2). CONSTITUTION: An extender EXR 348 is connected with the top end of a conventionally generated actual or absolute address. The value of each EXR 348 decides the section of an extremely large memory, and the type of the EXR position to be used is indicated by providing a central processing unit(CP) extended address mode(CPEAM) field 30 in a control register(CR). The CPEAM field indicates whether or not a CP EXR field is related with an AR, PTE, STE, or ASTE, and when the CP is operated in a DAT-ON mode 31, access to the indicated EXR type is performed in an address conversion process.