公开(公告)号：JP2001274394A

公开(公告)日：2001-10-05

申请号：JP2001048699

申请日：2001-02-23

Applicant: IBM

Inventor： BALLANTINE ARNE ,  RAYNER E GEERESU ,  HOOK TERENCE B ,  PETER SUMEISU

IPC: H01L21/76 ,  H01L21/28 ,  H01L29/772 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To provide a method for controlling dispersion of ion implantation and diffusion of dopant in an field effect transistor(FET) with a shallow junction that reduces a short-channel effect, and provide a device in this method. SOLUTION: The method includes a step for etching part of a polysilicon layer and exposing part of a gate dielectric 304; a step for forming a first oxide material 400 on the remaining polysilicon layer; a step for etching part of dielectric layer, exposing an isolation region 302, and forming a trench 500 in the substrate; a step for forming a second oxide layer 600 on the trench; a step for providing a spacer 700 adjoining to the first oxide layer and located on a part of the second oxide layer; a step for removing the exposing part of the second oxide layer and exposing a surface 800 of the trench; a step for removing the spacer 700; and a step for providing a semiconductor 1000 on the second oxide layer and the exposed surface of the trench.

公开(公告)号：GB2399451A

公开(公告)日：2004-09-15

申请号：GB0318083

申请日：2002-01-11

Applicant: IBM

Inventor： BALLANTINE ARNE ,  GROVES ROBERT ,  LUND JENNIFER ,  NAKOS JAMES ,  RICE MICHAEL ,  STAMPER ANTHONY

IPC: H01L21/768 ,  H01L21/822 ,  H01L23/522 ,  H01L23/58 ,  H01L27/04 ,  H01M4/58 ,  H01M6/02 ,  H01M6/18 ,  H01M6/42 ,  H01M10/052 ,  H01M10/0562 ,  H01M10/058 ,  H01M10/36 ,  H01M10/42

Abstract: A method and structure that provides a battery (420) within an integrated circuit for providing voltage to low-current electronic devices (900) that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices (900) on a semiconductor wafer (402), followed by Back-End-Of-Line (BEOL) integration for wires the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery (420) is formed during BEOL integration within one or more wiring levels, and the conductive metallization (432,434,442,444) conductively couples positive (424) and negative (422) terminals of the battery to the electronic devices (900). The battery (420) may have several different topologies relative to the structural and geometrical relationships among the battery electrodes and electrolyte. Multiple batteries may be formed within one or more wiring levels, and may be conductively coupled to the electronic devices. The multiple batteries may be connected in series or in parallel.

公开(公告)号：CA2434875A1

公开(公告)日：2002-07-25

申请号：CA2434875

申请日：2002-01-11

Applicant: IBM

Inventor： STAMPER ANTHONY ,  RICE MICHAEL ,  NAKOS JAMES ,  GROVES ROBERT ,  BALLANTINE ARNE ,  LUND JENNIFER

IPC: H01L21/768 ,  H01L21/822 ,  H01L23/522 ,  H01L23/58 ,  H01L27/04 ,  H01M4/58 ,  H01M6/02 ,  H01M6/18 ,  H01M6/42 ,  H01M10/052 ,  H01M10/0562 ,  H01M10/058 ,  H01M10/36 ,  H01M10/42

Abstract: A method and structure that provides a battery (420) within an integrated circuit for providing voltage to low-current electronic devices (900) that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices (900) on a semiconductor wafer (402), followed by Back-End-Of-Line (BEOL) integration f or wires the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery (420) is formed during BEOL integration within one or more wiring levels, and the conductive metallization (432,434,442,444) conductively couples positive (42 4) and negative (422) terminals of the battery to the electronic devices (900). The battery (420) may have several different topologies relative to the structural and geometrical relationships among the battery electrodes and electrolyte. Multiple batteries may be formed within one or more wiring levels, and may be conductively coupled to the electronic devices. The multiple batteries may be connected in series or in parallel.

公开(公告)号：GB2399451B

公开(公告)日：2005-08-17

申请号：GB0318083

申请日：2002-01-11

Applicant: IBM

Inventor： BALLANTINE ARNE ,  GROVES ROBERT ,  LUND JENNIFER ,  NAKOS JAMES ,  RICE MICHAEL ,  STAMPER ANTHONY

IPC: H01L21/768 ,  H01L21/822 ,  H01L23/522 ,  H01L23/58 ,  H01L27/04 ,  H01M4/58 ,  H01M6/02 ,  H01M6/18 ,  H01M6/42 ,  H01M10/052 ,  H01M10/0562 ,  H01M10/058 ,  H01M10/36 ,  H01M10/42

Abstract: A method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices on a semiconductor wafer, followed by Back-End-Of-Line (BEOL) integration for wires connecting the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery is formed during BEOL integration within one or more wiring levels, and the conductive metallization conductively couples positive and negative terminals of the battery to the electronic devices. The battery may have several different topologies relative to the structural and geometrical relationships among the battery electrodes and electrolyte. Multiple batteries may be formed within one or more wiring levels, and may be conductively coupled to the electronic devices. The multiple batteries may be connected in series or in parallel.