Encapsulation topography-assisted self-aligned MRAM top contact

    公开(公告)号:GB2601100B

    公开(公告)日:2022-08-31

    申请号:GB202204077

    申请日:2020-09-08

    Applicant: IBM

    Abstract: Encapsulation topography-assisted techniques for forming self-aligned top contacts in MRAM devices are provided. In one aspect, a method for forming an MRAM device includes: forming MTJs on interconnects embedded in a first dielectric; depositing an encapsulation layer over the MTJs; burying the MTJs in a second dielectric; patterning a trench in the second dielectric over the MTJs exposing the encapsulation layer over tops of the MTJs which creates a topography at the trench bottom; forming a metal line in the trench over the topography; recessing the metal line which breaks up the metal line into segments separated by exposed peaks of the encapsulation layer; recessing the exposed peaks of the encapsulation layer to form recesses at the tops of the MTJs; and forming self-aligned contacts in the recesses. An MRAM device is also provided.

    Encapsulation topography-assisted self-aligned MRAM top contact

    公开(公告)号:GB2601100A

    公开(公告)日:2022-05-18

    申请号:GB202204077

    申请日:2020-09-08

    Applicant: IBM

    Abstract: A method for forming an MRAM device includes: forming MTJs (202) on interconnects (106) embedded in a first dielectric (102); depositing an encapsulation layer (204) over the MTJs (202); burying the MTJs (202) in a second dielectric (206); patterning a trench (302') in the second dielectric (206) over the MTJs (202) exposing the encapsulation layer (204) over tops of the MTJs (202) which creates a topography at the trench (302') bottom; forming a metal line (904) in the trench (302') over the topography; recessing the metal line (904) which breaks up the metal line (904) into segments (904a, 904b) separated by exposed peaks of the encapsulation layer (204); recessing the exposed peaks of the encapsulation layer (204) to form recesses at the tops of the MTJs (202); and forming self-aligned contacts (1202) in the recesses. An MRAM device is also provided.

    Structure and fabrication method for electromigration immortal nanoscale interconnects

    公开(公告)号:GB2555269A

    公开(公告)日:2018-04-25

    申请号:GB201718865

    申请日:2016-05-27

    Applicant: IBM

    Abstract: After forming a trench opening (52) including narrow trench portions (52A) spaced apart by wide trench portions (52B) and forming a stack of a first diffusion barrier layer (62) and a first liner layer (64) on sidewalls and a bottom surface of the trench opening (52), a reflow process is performed to fill the narrow trench portions (52A) but not the wide trench portions (52B) with a first conductive material layer (66). A stack of a second diffusion barrier layer (72) and a second liner layer (74) is formed on portions of the first liner layer (64) and ends of the first conductive material layer (66) exposed by the wide trench portions (52B). A second conductive material layer (76) is deposited to fill the wide trench portions (52B). Portions of the second diffusion barrier layer (72) and the second liner layer (74) located between the first conductive material layer (66) and the second conductive material layer (76) act as vertical blocking boundaries to prevent the electromigration of metal atoms.

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