-
1.
公开(公告)号:US3518756A
公开(公告)日:1970-07-07
申请号:US3518756D
申请日:1967-08-22
Applicant: IBM
Inventor: BENNETT MARVIN , BOYD WARREN E , NOBILE JOSEPH C
CPC classification number: H01L21/4857 , Y10T29/42 , Y10T29/435 , Y10T29/49099 , Y10T29/49155 , Y10T29/49993
-
公开(公告)号:US3916266A
公开(公告)日:1975-10-28
申请号:US42449073
申请日:1973-12-13
Applicant: IBM
Inventor: BENNETT MARVIN , NUCCIO CARLO , WURMS CHARLES
IPC: H05K1/14 , H01L21/768 , H01L23/13 , H01L23/52 , H01L23/522 , H01L23/538 , H01L25/00 , H05K1/00 , H05K1/05 , H05K7/20 , H02B1/00
CPC classification number: H01L23/5385 , H01L23/13 , H01L2924/0002 , H01L2924/09701 , H05K1/0284 , H05K1/053 , H05K1/056 , H05K2201/09118 , H05K2201/09754 , H05K2201/0999 , H01L2924/00
Abstract: A package for interconnecting a plurality of integrated circuit chips including a dielectric body having a plurality of intersecting planes and a plurality of metallized interconnection patterns located thereon. Conductive interconnecting lines connected to at least some of said metallized patterns located on different intersecting planes provide inter-plane electrical continuity, and input/output connectors connect to at least one of the metallized patterns for connecting to the outside world.
Abstract translation: 一种用于互连多个集成电路芯片的封装,包括具有多个相交平面的绝缘体和位于其上的多个金属化互连图案。 连接到位于不同交叉平面上的至少一些所述金属化图案的导电互连线提供了平面间电连续性,并且输入/输出连接器连接至至少一个金属化图案以连接到外界。
-
公开(公告)号:DE1765980B1
公开(公告)日:1971-09-08
申请号:DE1765980
申请日:1968-08-21
Applicant: IBM
Inventor: BENNETT MARVIN , EDWARD BOYD WARREN , CHARLES NOBILE JOSEPH
Abstract: 1,234,673. Ceramic laminates. INTERNATIONAL BUSINESS MACHINES CORP. 26 July, 1968 [22 Aug., 1967], No. 35712/68. Heading B5N. [Also in Division H1] A method of forming a monolithic structure e.g. a micro-electronic device from a plurality of sheets consisting of particulate material e.g. ceramic material, dispersed in a binder e.g. polyvinyl butyral, comprises placing the sheets over a die cavity, effecting relative movement between the die cavity and a die member adapted to co-operate with the cavity to cut a portion of the stacked sheets to the cross-sectional shape of the cavity and force them into the cavity, and laminating the cut sheets into a monolithic structure in the cavity by maintaining a high pressure on the cut sheets between the die member and a bottom surface of the cavity. Specified ceramic materials are alumina, zircon, aluminium silicate, zirconium dioxide, titanium dioxide, magnesium silicate, barium titanate and mixtures thereof. In the example, a monolithic structure containing a plurality of spaced micro-electronic circuits is made by feeding dried ceramic films 20, 21 and 22 past punch presses 29, 32 and 43 respectively, the punch presses forming perforations 42 along the longitudinal edges of the films, through holes 30 and 33 to allow subsequent electrical connection between the spaced semi-conductor patterns at different levels and semi-conductor receiving cavities 31 also being formed by the punch presses, electrode paste e.g. of tungsten, molybdenum, platinum, palladium, silver or alloys thereof being applied to the films by silk-screen printers 34, 35 and 36 to form circuit patterns 37, 38 and 39 thereon, a portion of the electrode paste being squeezed into the through holes and optionally into the cavities, the films being aligned and fed by sprocketed rollers 40 and 41 cooperating with the perforations 42 to a press which cuts the films, presses the cut sections thereof into a monolithic structure and forms terminal holes therein, the resultant product being sintered to burn off the binder, vitrify the structure, fire the screened electrodes and embed contact pins embedded in the terminal holes. The press 51 has a body portion with a cavity therein defined by walls 52, a lower die 53 having a plurality of vertical channels 54 with a plurality of punches 55 slidably held within the said channels and an upper die 56 provided with a plurality of channels 57 in registry with and for reception of the punches 55. In operating the press, the films 20, 21 and 22 are stacked across the mouth of the cavity and the upper die 56 lowered to cut through the films, the punches being simultaneously raised to form the terminal holes through the films and to force the punched material into channels 57, the upper die continuing its downward movement until the punched films contact the lower die 53 and full laminating pressure is applied, the lower die then being raised to eject the resultant monolithic structure from the cavity.
-
公开(公告)号:CA878452A
公开(公告)日:1971-08-17
申请号:CA878452D
Applicant: IBM
Inventor: NOBILE JOSEPH C , BOYD WARREN E , BENNETT MARVIN
-
公开(公告)号:DE2451211A1
公开(公告)日:1975-06-26
申请号:DE2451211
申请日:1974-10-29
Applicant: IBM
Inventor: BENNETT MARVIN , NUCCIO CARLO , WURMS CHARLES
IPC: H05K1/14 , H01L21/768 , H01L23/13 , H01L23/52 , H01L23/522 , H01L23/538 , H01L25/00 , H05K1/00 , H05K1/05 , H05K7/20 , H05K3/36
Abstract: A package for interconnecting a plurality of integrated circuit chips including a dielectric body having a plurality of intersecting planes and a plurality of metallized interconnection patterns located thereon. Conductive interconnecting lines connected to at least some of said metallized patterns located on different intersecting planes provide inter-plane electrical continuity, and input/output connectors connect to at least one of the metallized patterns for connecting to the outside world.
-
-
-
-