公开(公告)号：US3757138A

公开(公告)日：1973-09-04

申请号：US3757138D

申请日：1972-05-04

Applicant: IBM

Inventor： BHATIA H ,  DAVIS D ,  MARTIN D

IPC: G11C11/41 ,  G11C5/00 ,  H02J1/00 ,  H03K5/02 ,  H03K17/66 ,  H03K19/086 ,  H03K5/20

CPC classification number: H03K5/02 ,  G11C5/00

Abstract: A line driver circuit for driving highly capacitive or low impedance loads such as the data and power lines that extend from chip to chip of integrated memory and logic circuits utilized in digital computers, peripheral apparatuses therefor and similar digital equipment. The line driver circuit comprises a current switch direct-current-coupled to a single-ended push-pull output stage. The current switch comprises a pair of transistors having their emitters connected to a current source. The output stage comprises a pair of output transistors with the emitter of one output transistor and the collector of the other transistor connected together and to the output of the circuit. The collectors of the current switch transistors are direct-currentcoupled to the respective bases of the output stage transistors. The line driver circuit further comprises an active feedback network for limiting the amplitude of the downward swing of the potential of the output terminal of the output stage and including a feedback transistor having its emitter connected to the output of the output stage and its collector connected to the collector of one of the current switch transistors.

公开(公告)号：BR7806949A

公开(公告)日：1979-05-15

申请号：BR7806949

申请日：1978-10-23

Applicant: IBM

Inventor： ANANTHA N ,  WALSH J ,  BHATIA H

IPC: H01L29/73 ,  H01L21/033 ,  H01L21/225 ,  H01L21/331 ,  H01L21/762 ,  H01L23/532 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L21/32 ,  H01L29/08

Abstract: A method for manufacturing a high performance bipolar device and the resulting structure which has a very small emitter-base spacing is described. The small emitter-base spacing, reduces the base resistance compared to earlier device spacing and thereby improves the performance of the bipolar device. The method involves providing a silicon semiconductor body having regions of monocrystalline silicon isolated from one another by isolation regions and a buried subcollector therein. A base region is formed in the isolated monocrystalline silicon. A mask is formed on the surface of the silicon body covering those regions designated to be the emitter and collector reach-through regions. A doped polycrystalline silicon layer is then formed through the mask covering the base region and making ohmic contact thereto. An insulating layer is formed over the polysilicon layer. The mask is removed from those regions designated to be the emitter and collector reach-through regions. The emitter junction is then formed in the base region and the collector reach-through formed to contact the buried subcollector. Electrical contacts are made to the emitter and collector. The doped polycrystalline silicon layer is the electrical contact to the base regions.