公开(公告)号：US3757138A

公开(公告)日：1973-09-04

申请号：US3757138D

申请日：1972-05-04

Applicant: IBM

Inventor： BHATIA H ,  DAVIS D ,  MARTIN D

IPC: G11C11/41 ,  G11C5/00 ,  H02J1/00 ,  H03K5/02 ,  H03K17/66 ,  H03K19/086 ,  H03K5/20

CPC classification number: H03K5/02 ,  G11C5/00

Abstract: A line driver circuit for driving highly capacitive or low impedance loads such as the data and power lines that extend from chip to chip of integrated memory and logic circuits utilized in digital computers, peripheral apparatuses therefor and similar digital equipment. The line driver circuit comprises a current switch direct-current-coupled to a single-ended push-pull output stage. The current switch comprises a pair of transistors having their emitters connected to a current source. The output stage comprises a pair of output transistors with the emitter of one output transistor and the collector of the other transistor connected together and to the output of the circuit. The collectors of the current switch transistors are direct-currentcoupled to the respective bases of the output stage transistors. The line driver circuit further comprises an active feedback network for limiting the amplitude of the downward swing of the potential of the output terminal of the output stage and including a feedback transistor having its emitter connected to the output of the output stage and its collector connected to the collector of one of the current switch transistors.

公开(公告)号：BR7704576A

公开(公告)日：1978-04-04

申请号：BR7704576

申请日：1977-07-12

Applicant: IBM

Inventor： HABEGGER M ,  DAVIS D ,  YOURKE H

IPC: H01L21/027 ,  G01D5/39 ,  H01L21/00 ,  H01L21/68

公开(公告)号：BR7504006A

公开(公告)日：1976-07-06

申请号：BR7505151

申请日：1975-06-26

Applicant: IBM

Inventor： DAVIS D ,  WEBER E ,  WOODARD O ,  HABEGGER M ,  MOORE R

IPC: G05D3/12 ,  H01J37/304 ,  H01L21/027 ,  G01N23/00

Abstract: 1508903 Wave energy position finding INTERNATIONAL BUSINESS MACHINES CORP 23 May 1975 [27 June 1974] 22919/75 Heading G1A [Also in Division H4] The position of a registration mark on a target (e.g. a semi-conductor wafer) is detected by irradiating the mark with a beam of charged particles. The present invention is stated to be an improvement over the system described in Specification 1480562. As described, each mark 42, Fig. 17, consists of vertical and horizontal bars 44, 43 (raised portions or depressions), the position of the mark being determined from 20 horizontal (X) scans followed by 20 vertical (Y) scans, successive scans being in opposite directions. Peak signals corresponding to the edges of a bar are detected and applied to threshold circuitry which is updated during each scan. Diodes 45, 46 and 45', 46' detect radiation during X, Y scans respectively, the arrangement including extra diodes 47 and an extra lead going to a respective preamplifier 48-66 for noise suppression. X-scanning: The outputs 70, 71 from diodes 45, 46 contain peaks 72 &c. corresponding to the edges of a bar 44. These signals pass to a differential amplifier 69 via balancers 58, 60 which compensate for the fact that the mark being scanned will be nearer one diode than the other. The output 85, Fig. 13, from amplifier 69 contains positive and negative peaks 86, 87 corresponding to the edges of a bar. The signals are shown without any ramp component. Such component is removed in filter 89 to leave the peak signals plus a substantially constant residual baseline voltage, Figs. 14 and 15 (not shown). The output from filter 89 is fed via an AGC circuit 90 to positive and negative peak detectors 99, 100 and an averaging circuit 122. During the first scan, outputs 103, 104 from detectors 99, 100 are used to set the gain levels in AGC 90 for subsequent scans so as to compensate for the surface conditions on the wafer in the region of the mark being scanned. At the end of the first scan the contents of 99, 100, 122 are passed to stores 143, 128, 136 the outputs of which are combined by means of resistors 144, 140, 137 to produce positive and negative threshold signals 134 and 141 which are correlated with the residual baseline voltage. These signals pass via differential amplifiers 135, 142 to act as threshold levels for voltage comparators 118, 119 receiving signals from AGC 90 via a switch 116 (blocked during the first scan). During the second scan, fresh data is fed to detectors 99 &c. and stores 143 &c. and switch 116 is enabled to pass the output of AGC 90 to the comparators, outputs of which are however not used until the third scan. During the third and subsequent scans, comparators 118, 119 produce signals whenever the signals from AGC 90 cross the levels set during the preceding scan by amplifiers 135, 142. The ORed outputs from 118, 119 enable a gate 151, so that clockpulses 153 pass to a feedback channel 152 and a computer 19 which uses the detected-edge signals, averaged over the last 18 scans, to determine the location of mark 42. Since successive scans occur in opposite directions, stores 143, 136 incorporate means for reversing the sign of their outputs, so that detectors 99, 100 continue to detect the same edge of a bar 44 during successive scans. The Y-scan is then performed in the same way. The various blocks of Fig. 2 are described in detail with reference to Figs. 3-9 (not shown).