公开(公告)号：EP1573553A4

公开(公告)日：2007-11-21

申请号：EP02795913

申请日：2002-12-17

Applicant: IBM

Inventor： BLANCO RAFAEL ,  SMITH JACK R ,  VENTRONE SEBASTIAN T

IPC: G06F12/08

CPC classification number: G06F12/0886 ,  G06F12/0864

Abstract: The invention provides for selectively changing a line width for a memory, i.e., selecting one of a plurality of line widths for a memory (14). The selected line width is used in communicating with one or more processors (12, 26). This provides increased flexibility and efficiency for communicating with the memory. In particular, a register (42) can be set based on a desired line width, and subsequently used when locating data in the memory. The selected line width can be associated with each data block (38) in the memory to allow multiple line widths to be used simultaneously. When implemented in a cache (30, 130), multiple ways (40) of the cache can be processed as a group to provide data during a single memory operation. The line width can be varied based on a task (13, 28), a processor, and/or a performance evaluation.

Abstract translation: 本发明提供了选择性地改变存储器的线宽，即为存储器（14）选择多个线宽中的一个。 选定的线宽用于与一个或多个处理器（12,26）通信。 这为与内存进行通信提供了更高的灵活性和效率。 具体地说，寄存器（42）可以基于期望的线宽设置，并且随后在将数据定位在存储器中时使用。 选定的行宽可以与存储器中的每个数据块（38）相关联以允许同时使用多个行宽度。 当在高速缓存（30,130）中实现时，可以将高速缓存的多个路（40）作为一组处理，以在单个存储器操作期间提供数据。 线宽可以根据任务（13,28），处理器和/或性能评估而变化。

公开(公告)号：EP1644964A4

公开(公告)日：2008-07-30

申请号：EP04778016

申请日：2004-07-09

Applicant: IBM

Inventor： BLANCO RAFAEL ,  COHN JOHN M ,  GOODNOW KENNETH J ,  STOUT DOUGLAS W ,  VENTRONE SEBASTIAN T

IPC: G11C16/04 ,  G06F1/32 ,  G11C5/14 ,  G11C19/08 ,  H01L20060101

CPC classification number: G06F1/3203 ,  G06F1/3287 ,  G11C5/144 ,  G11C5/147 ,  G11C2207/2227 ,  Y02D10/171

Abstract: A structure and associated method of processing data on a semi-conductor device comprising an input island, a processing island, and an output island formed on the semiconductor device. The input island is adapted to accept a specified amount of data and enable a means for providing a first specified voltage for powering the processing island after accepting the specified amount of data. The processing island is adapted to receive and process the specified amount of data from the input island upon powering the processing island by the first specified voltage. The output island is adapted to be powered by a second specified voltage. The processing island is further adapted to transmit the processed data to the output island upon said powering by the second specified voltage. The first specified voltage is adapted to be disabled thereby removing power from processing island upon completion of transmission of the processed data to the output island.

公开(公告)号：WO2005008732A3

公开(公告)日：2007-07-05

申请号：PCT/US2004022267

申请日：2004-07-09

Applicant: IBM ,  BLANCO RAFAEL ,  COHN JOHN M ,  GOODNOW KENNETH J ,  STOUT DOUGLAS W ,  VENTRONE SEBASTIAN T

Inventor： BLANCO RAFAEL ,  COHN JOHN M ,  GOODNOW KENNETH J ,  STOUT DOUGLAS W ,  VENTRONE SEBASTIAN T

IPC: G11C16/04 ,  G11C19/08 ,  H01L20060101

CPC classification number: G06F1/3203 ,  G06F1/3287 ,  G11C5/144 ,  G11C5/147 ,  G11C2207/2227 ,  Y02D10/171

Abstract: A structure for processing data on a semiconductor device comprising an input island (14), a processing island (8), and an output island (12) formed on the semiconductor device (18). The input island is adapted to accept a specified amount of data and enable a means for providing a first specified voltage for powering the processing island after accepting the specified amount of data. The processing island is adapted to receive and process the specified amount of data from the input island upon powering the processing island by the first specified voltage. The output island is adapted to be powered by a second specified voltage. The processing island is further adapted to transmit the processed data to the output island upon said powering by the second specified voltage. The first specified voltage is adapted to be disabled thereby removing power from processing island upon completion of transmission of the processed data to the output island.

Abstract translation: 一种用于在半导体器件上处理数据的结构，包括形成在半导体器件（18）上的输入岛（14），处理岛（8）和输出岛（12）。 输入岛适于接收指定数量的数据，并且能够在接受指定数量的数据之后启用用于提供用于为处理岛供电的第一指定电压的装置。 处理岛适于在对处理岛供电第一指定电压时从输入岛接收和处理指定量的数据。 输出岛适于由第二规定电压供电。 处理岛还适于在所述第二规定电压的供电时将经处理的数据发送到输出岛。 第一指定电压适于被禁用，从而在完成将处理的数据传输到输出岛时从处理岛去除功率。

公开(公告)号：DE602004020620D1

公开(公告)日：2009-05-28

申请号：DE602004020620

申请日：2004-07-09

Applicant: IBM

Inventor： BLANCO RAFAEL ,  COHN JOHN M ,  GOODNOW KENNETH J ,  STOUT DOUGLAS W ,  VENTRONE SEBASTIAN T

IPC: H01L21/00 ,  G06F1/32 ,  G11C5/14 ,  G11C19/08 ,  H01L20060101

Abstract: A structure and associated method of processing data on a semi-conductor device comprising an input island, a processing island, and an output island formed on the semiconductor device. The input island is adapted to accept a specified amount of data and enable a means for providing a first specified voltage for powering the processing island after accepting the specified amount of data. The processing island is adapted to receive and process the specified amount of data from the input island upon powering the processing island by the first specified voltage. The output island is adapted to be powered by a second specified voltage. The processing island is further adapted to transmit the processed data to the output island upon said powering by the second specified voltage. The first specified voltage is adapted to be disabled thereby removing power from processing island upon completion of transmission of the processed data to the output island.

公开(公告)号：AT429015T

公开(公告)日：2009-05-15

申请号：AT04778016

申请日：2004-07-09

Applicant: IBM

Inventor： BLANCO RAFAEL ,  COHN JOHN M ,  GOODNOW KENNETH ,  STOUT DOUGLAS ,  VENTRONE SEBASTIAN

IPC: G11C16/04 ,  G06F1/32 ,  G11C5/14 ,  G11C19/08 ,  H01L20060101

Abstract: A structure and associated method of processing data on a semi-conductor device comprising an input island, a processing island, and an output island formed on the semiconductor device. The input island is adapted to accept a specified amount of data and enable a means for providing a first specified voltage for powering the processing island after accepting the specified amount of data. The processing island is adapted to receive and process the specified amount of data from the input island upon powering the processing island by the first specified voltage. The output island is adapted to be powered by a second specified voltage. The processing island is further adapted to transmit the processed data to the output island upon said powering by the second specified voltage. The first specified voltage is adapted to be disabled thereby removing power from processing island upon completion of transmission of the processed data to the output island.

公开(公告)号：AU2002360640A1

公开(公告)日：2004-07-29

申请号：AU2002360640

申请日：2002-12-17

Applicant: IBM

Inventor： VENTRONE SEBASTIAN T ,  BLANCO RAFAEL ,  SMITH JACK R

IPC: G06F12/08 ,  G06F12/0864 ,  G06F12/0886