公开(公告)号：AT463828T

公开(公告)日：2010-04-15

申请号：AT02711020

申请日：2002-02-07

Applicant: IBM

Inventor： ACOSTA RAUL ,  LUND JENNIFER ,  GROVES ROBERT ,  ROSNER JOANNA ,  CORDES STEVEN ,  CARASSO MELANIE

IPC: H01F17/00 ,  H01F41/04 ,  H01F17/02 ,  H01F27/36

Abstract: Inductor losses to a semiconducting substrate are eliminated in an IC structure by etching a well into the substrate down to the insulating layer coating the substrate and fabricating a grounded Faraday shield in the shape of elongated segments in the bottom of the well. The well lies directly below the inductor and is optionally filled with cured low-k organic dielectric or air.

公开(公告)号：DE60235872D1

公开(公告)日：2010-05-20

申请号：DE60235872

申请日：2002-02-07

Applicant: IBM

Inventor： ACOSTA RAUL ,  LUND JENNIFER ,  GROVES ROBERT ,  ROSNER JOANNA ,  CORDES STEVEN ,  CARASSO MELANIE

IPC: H01F17/00 ,  H01F41/04 ,  H01F17/02 ,  H01F27/36

Abstract: Inductor losses to a semiconducting substrate are eliminated in an IC structure by etching a well into the substrate down to the insulating layer coating the substrate and fabricating a grounded Faraday shield in the shape of elongated segments in the bottom of the well. The well lies directly below the inductor and is optionally filled with cured low-k organic dielectric or air.

公开(公告)号：AT478438T

公开(公告)日：2010-09-15

申请号：AT02725187

申请日：2002-03-13

Applicant: IBM

Inventor： ACOSTA RAUL ,  CARASSO MELANIE ,  CORDES STEVEN ,  GROVES ROBERT ,  LUND JENNIFER ,  ROSNER JOANNA

IPC: H01L29/82 ,  H01F17/00 ,  H01F17/04 ,  H01F17/06 ,  H01F27/00 ,  H01F27/06 ,  H01F41/04 ,  H01L21/02 ,  H01L27/08 ,  H01L29/00

Abstract: A means for fabrication of solenoidal inductors integrated in a semiconductor chip is provided. The solenoidal coil is partially embedded in a deep well etched into the chip substrate. The non-embedded part of the coil is fabricated as part of the BEOL metallization layers. This allows for a large cross-sectional area of the solenoid turns, thus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The fabrication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric followed by fabrication of the part of the coil that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric and planarization of same by CMP. After planarization the fabrication of the remaining part of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil part of it may be built by electrodeposition through a mask on top of the BEOL layers.