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    Electrophotographic charge generation layer
    3.
    发明授权
    Electrophotographic charge generation layer 失效
    电子照相产生层

    公开(公告)号：US3861913A

    公开(公告)日：1975-01-21

    申请号：US23998472

    申请日：1972-03-31

    Applicant: IBM

    Inventor： CHIOU CHARLES

    IPC: C01B19/04 ,  G03G5/043 ,  G03G5/08 ,  H01L31/08 ,  G03G5/02

    CPC classification number: G03G5/0433 ,  G03G5/0436

    Abstract: An electrophotographic plate comprising a conductive substrate, a charge transport layer and a charge generation layer consisting essentially of from 5 to 35 percent by weight tellurium and from 0.5 to 20 percent by weight arsenic, with the substantial balance being vitreous selenium.

    Abstract translation: 一种电子照相平板，包括导电基底，电荷传输层和电荷产生层，其基本上由5至35重量％的碲和0.5至20重量％的砷组成，其基本平衡为玻璃硒。

    4.
    发明专利
    未知

    公开(公告)号：DE1256995B

    公开(公告)日：1967-12-21

    申请号：DEJ0026538

    申请日：1964-09-11

    Applicant: IBM

    Inventor： CHIOU CHARLES ,  COUNTY WESTCHESTER ,  CONNELL RICHARD ALLEN ,  MISSION SHAWNEE ,  COUNTY JOHNSON ,  SERAPHIM DONALD PHILIP

    IPC: C23C14/14 ,  C23C14/58 ,  G11C11/44 ,  H01L39/00

    Abstract: A superconductive memory element is made by vacuum depositing a film which is a mixture of germanium and a superconductor on an insulating substrate and then annealing the film to concentrate the germanium into particles within the film. The film preferably consists of 5-40% by weight of germanium and the residue tin or indium, and is 800-2000ALPHA thick. Annealing is effected at 110 DEG C. for 42 hours in vacuo. The germanium and tin or indium may be deposited simultaneously from separate boats or from a mixture in a common boat. In the latter case the mixture is heated slowly to a temperature below the evaporating temperature of either metal and then quickly raised to a temperature above the evaporating temperature of both. Suitable materials for the substrate are glass, mica and resin.

    5.
    发明专利
    未知

    公开(公告)号：FR2296470A1

    公开(公告)日：1976-07-30

    申请号：FR7536064

    申请日：1975-11-19

    Applicant: IBM

    Inventor： CHIOU CHARLES ,  GALLI GUIDO ,  LOEFFLER KARL H ,  LORENZ MAX R

    IPC: B26F1/26 ,  B41J2/16 ,  B05B1/02 ,  G01D15/18 ,  H04N1/034 ,  B41J3/04

    Abstract: 1493667 Ink jets INTERNATIONAL BUSINESS MACHINES CORP 27 Oct 1975 [31 Dec 1974] 43996/75 Heading B6P A nozzle structure for an ink jet includes a monocrystalline semi-conducting substrate 20 with an array of passages 21 (only one shown), and a layer 22 of uniform thickness overlying the substrate with orifices 23, each passage 21 is associated with an orifice 23 and their central axes are aligned. As shown a silicon substrate 20 receives a layer 22 (silicon dioxide or nitride) by vapour deposition, sputtering or thermal oxide growth. In step C a mask 35 is applied to control the anisotropic etching to produce passage 21 (step D). The orifice 23 can be produced by chemical/ sputter/ion/plasma etch through a mask 36.

    6.
    发明专利
    未知

    公开(公告)号：DE2554085A1

    公开(公告)日：1976-07-15

    申请号：DE2554085

    申请日：1975-12-02

    Applicant: IBM

    Inventor： CHIOU CHARLES ,  GALLI GUIDO ,  LOEFFLER KARL H ,  LORENZ MAX RUDOLPH

    IPC: B05B1/02 ,  B26F1/26 ,  B41J2/16 ,  G01D15/18 ,  H04N1/034 ,  B41J3/04

    Abstract: 1493667 Ink jets INTERNATIONAL BUSINESS MACHINES CORP 27 Oct 1975 [31 Dec 1974] 43996/75 Heading B6P A nozzle structure for an ink jet includes a monocrystalline semi-conducting substrate 20 with an array of passages 21 (only one shown), and a layer 22 of uniform thickness overlying the substrate with orifices 23, each passage 21 is associated with an orifice 23 and their central axes are aligned. As shown a silicon substrate 20 receives a layer 22 (silicon dioxide or nitride) by vapour deposition, sputtering or thermal oxide growth. In step C a mask 35 is applied to control the anisotropic etching to produce passage 21 (step D). The orifice 23 can be produced by chemical/ sputter/ion/plasma etch through a mask 36.

    ELECTROPHOTOGRAPHIC CHARGE GENERATION LAYER
    7.
    发明专利
    ELECTROPHOTOGRAPHIC CHARGE GENERATION LAYER 未知

    公开(公告)号：CA985550A

    公开(公告)日：1976-03-16

    申请号：CA165478

    申请日：1973-02-28

    Applicant: IBM

    Inventor： CHIOU CHARLES

    IPC: C01B19/04 ,  G03G5/043 ,  G03G5/08 ,  H01L31/08

    Abstract: An electrophotographic plate comprising a conductive substrate, a charge transport layer and a charge generation layer consisting essentially of from 5 to 35 percent by weight tellurium and from 0.5 to 20 percent by weight arsenic, with the substantial balance being vitreous selenium.

    8.
    发明专利
    未知

    公开(公告)号：DE1640457B1

    公开(公告)日：1970-10-29

    申请号：DE1640457

    申请日：1966-05-07

    Applicant: IBM

    Inventor： CHIOU CHARLES ,  GARCIA JOSEPH RANDOLPH

    IPC: H01L23/12 ,  H01L21/60

    Abstract: 1,073,910. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORPORATION. June 7, 1966 [June 23, 1965], No. 25227/66. Heading H1K. Connections to a semi-conductor device mounted in a cavity in an insulating substrate are produced by packing the gap between the sides of the device and the wall of the cavity with a powder, depositing the connections across the powder and then removing the powder. As shown, Fig. 1A, the semi-conductor device 16 is provided with a glass surface layer on which are located terminal lands 12B of aluminium. Corresponding terminal lands 12A are provided on surface 14 of insulating substrate 10 by evaporating through a mask first a layer of chromium and then a layer of aluminium or copper. The gap 20 around device 16 is filled with silicon dioxide powder compacted by means of a vibration tool and then levelled with the surfaces of the device and substrate. Aluminium is evaporated on to the surface of the powder using a molybdenum mask optically aligned with lands 12A, 12B to form continuous connections between them. The powder is then ultrasonically blown or cleaned out of the gap 20 leaving the deposited strips bridging the gap between corresponding ones of the lands 12A, 12B. The semi-conductor device may be a monolithic or other integrated arrangement of silicon and may contain a plurality of active devices, such as transistors and diodes, and may have passive devices, such as resistors and capacitors, formed on its surface. The device is mounted by evaporating a layer of chromium followed by a layer of gold on to the floor of the cavity and providing a layer of gold on the lower face of device 10 so that when placed in position and heated under pressure a gold-silicon eutectic layer 18 is formed. The substrate may be of glass or of a ceramic such as alumina and the cavity may be produced by bonding two sheets of ceramic together, one of the sheets having been provided with an aperture, or by pressing the ceramic before it is cured. The substrate may have pins extending through it which are connected to the conductive lands, and such an arrangement may be mounted on a printed circuit board. The substrate may also be provided with buried conductive layers connected to the surface lands.

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