公开(公告)号：SG152150A1

公开(公告)日：2009-05-29

申请号：SG2008074650

申请日：2008-10-03

Applicant: CHARTERED SEMICONDUCTOR MFG ,  SAMSUNG ELECTRONICS CO LTD ,  IBM

Inventor： JUNG KIM JUN ,  WIDODO JOHNNY ,  CHAN KIM JOO ,  ZHAO LUN ,  EON PARK JAE ,  WILLE WILLIAM C ,  CONTI RICHARD ANTHONY ,  BIAO ZUO

Abstract: Methods of forming integrated circuit devices include forming a trench in a surface of semiconductor substrate and filling the trench with an electrically insulating region having a seam therein. The trench may be filled by depositing a sufficiently thick electrically insulating layer on sidewalls and a bottom of the trench. Curing ions are then implanted into the electrically insulating region at a sufficient energy and dose to reduce a degree of atomic order therein. The curing ions may be ones selected from a group consisting of nitrogen (N), phosphorus (P), boron (B), arsenic (As), carbon (C), argon (Ar), germanium (Ge), helium (He), neon (Ne) and xenon (Xe). These curing ions may be implanted at an energy of at least about 80 KeV and a dose of at least about 5x1014 ions/cm2. The electrically insulating region is then annealed at a sufficient temperature and for a sufficient duration to increase a degree of atomic order within the electrically insulating region. Figure 1E

公开(公告)号：SG68635A1

公开(公告)日：1999-11-16

申请号：SG1997003565

申请日：1997-09-25

Applicant: IBM

Inventor： BALASUBRAMANYAM KARANAM ,  BRODSKY STEPHEN BRUCE ,  CONTI RICHARD ANTHONY ,  EL-KAREH BADIH

IPC: H01L21/28 ,  H01L21/336 ,  H01L29/49 ,  H01L29/43 ,  H01L29/78

Abstract: A MOSFET device is formed on a P- doped semiconductor substrate with an N- well formed therein, with a pair of isolation regions formed in the N- well with a gate oxide layer formed above the N- well. An FET device is formed with source and drain regions within the N-well, and a gate electrode formed above the gate oxide layer aligned with the source and drain regions. The gate electrode comprises a stack of layers. A polysilicon layer is formed on the gate oxide layer. A tungsten nitride dopant barrier layer is formed upon the polysilicon layer having a thickness of from about 5 nm to about 20 nm, and a tungsten silicide layer is formed upon the tungsten nitride layer.