公开(公告)号：GB2556268A

公开(公告)日：2018-05-23

申请号：GB201801637

申请日：2016-08-02

Applicant: IBM

Inventor： PAUL ANDRY ,  BUCKNELL WEBB ,  CORNELIA KANG-I TSANG

IPC: H01M10/04 ,  H01M2/02 ,  H01M2/08 ,  H01M6/40

Abstract: A microbattery structure (101) for hermetically sealed microbatteries is provided. The microbattery structure (101) includes a first silicon substrate (1001) containing at least one pedestal which houses a cathode material (1601) of a microbattery and at least one depression (1003, 1004) which houses a first sealant material (1301) of the microbattery, the structure further includes a second silicon substrate (201) containing at least one pedestal which houses an anode material (601) of the microbattery and at least one depression (202, 204) which houses a second sealant material (801) of the microbattery. An insulated centerpiece (1401) is bonded to the first sealant material (1301) present in at least two depressions (202,204) on the first silicon substrate (1001). An interlock structure is formed by aligning and superimposing the second silicon substrate (201) on the first silicon substrate (1001) in a mortise and tenon fashion and sealing the two substrates (1001, 201) using a high force.

公开(公告)号：GB2556268B

公开(公告)日：2018-12-26

申请号：GB201801637

申请日：2016-08-02

Applicant: IBM

Inventor： PAUL ANDRY ,  BUCKNELL WEBB ,  CORNELIA KANG-I TSANG

IPC: H01M10/04 ,  H01M2/02 ,  H01M2/08 ,  H01M6/40

Abstract: A microbattery structure for hermetically sealed microbatteries is provided. In one embodiment, the microbattery structure includes a first silicon substrate containing at least one pedestal which houses a cathode material of a microbattery and at least one depression which houses A FIRST sealant material of the microbattery. The structure further includes a second silicon substrate containing at least one pedestal which houses an anode material of the microbattery and at least one depression which houses a second sealant material of the microbattery. An insulated centerpiece is bonded to the first sealant material present in at least two depressions on the first silicon substrate. An interlock structure is formed by aligning and superimposing the second silicon substrate on the first silicon substrate in a mortise and tenon fashion and sealing the two substrates using a high force.

公开(公告)号：GB2548726A

公开(公告)日：2017-09-27

申请号：GB201707907

申请日：2015-10-19

Applicant: IBM

Inventor： JEFFREY GELORME ,  LI-WEN HUNG ,  PAUL ANDRY ,  CORNELIA KANG-I TSANG ,  JOHN KNICKER-BOCKER ,  ROBERT DAVID ALLEN

IPC: H01L21/683

Abstract: A method for adhesive bonding in microelectronic device processing is provided that includes bonding a handling wafer to a front side of a device wafer with an adhesive comprising phenoxy resin; and thinning the device wafer from the backside of the device wafer while the device wafer is adhesively engaged to the handling wafer. After the device wafer has been thinned, the adhesive comprising phenoxy resin may be removed by laser debonding, wherein the device wafer is separated from the handling wafer.