Patent search ap:("IBM") AND inv:"DACOSTA DONALD J" Page 1

1.

发明专利
未知

公开(公告)号：BR9203871A

公开(公告)日：1993-05-04

申请号：BR9203871

申请日：1992-10-05

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J , DACOSTA DONALD J , DIEPENBROCK JOSEPH C , EPLEY PHILLIP R

IPC: H04L25/02 , G06F13/40 , H03K19/0175 , H04L25/08

2.

发明专利
PULSE TRANSFER SYSTEM 未知

公开(公告)号：CA894434A

公开(公告)日：1972-02-29

申请号：CA894434D

Applicant: IBM

Inventor： DACOSTA DONALD J

3.

发明专利
HIGH SPEED BUS TRANSCEIVER WITH FAULT TOLERANT DESIGN FOR HOT PLUGGABLE APPLICATIONS 未知

公开(公告)号：CA2178846C

公开(公告)日：1998-11-17

申请号：CA2178846

申请日：1992-07-03

Applicant: IBM

Inventor： EPLEY PHILLIP R , DACOSTA DONALD J , DIEPENBROCK JOSEPH C , CHRISTOPHER ROBERT J

IPC: H04B1/40

Abstract: A high-speed data transport system for use in computers, switches, microprocessors or the like includes a low impedance differential bus and a plurality of transceivers connected to the bus. Each of the transceivers is provided with a driver circuit which places data onto the bus and a receiver for accepting data from the bus. The driver includes a pseudo-differential current driving circuit arrangement which sinks current from only one side of the bus while the other side of the differential bus is undisturbed. The receiver includes a differential comparator biased to a preferred output voltage level.

4.

发明专利
HIGH SPEED BUS TRANSCEIVER WITH FAULT TOLERANT DESIGN FOR HOT PLUGGABLE APPLICATIONS 未知

公开(公告)号：CA2073105A1

公开(公告)日：1993-04-29

申请号：CA2073105

申请日：1992-07-03

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J , DACOSTA DONALD J , DIEPENBROCK JOSEPH C , EPLEY PHILLIP R

IPC: H04L25/02 , G06F13/40 , H03K19/0175 , H04L25/08

5.

发明专利
HIGH SPEED BUS TRANSCEIVER WITH FAULT TOLERANT DESIGN FOR HOT PLUGGABLE APPLICATIONS 未知

公开(公告)号：CA2073105C

公开(公告)日：1997-01-21

申请号：CA2073105

申请日：1992-07-03

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J , DACOSTA DONALD J , DIEPENBROCK JOSEPH C , EPLEY PHILLIP R

IPC: H04L25/02 , G06F13/40 , H03K19/0175 , H04L25/08 , H03K19/082

Abstract: A high-speed data transport system for use in computers, switches, microprocessors or the like includes a low impedance differential bus and a plurality of transceivers connected to the bus. Each of the transceivers is provided with a driver circuit which places data onto the bus and a receiver for accepting data from the bus. The driver includes a pseudo-differential current driving circuit arrangement which sinks current from only one side of the bus while the other side of the differential bus is undisturbed. The receiver includes a differential comparator biased to a preferred output voltage level.

6.

发明专利
High Speed Bus Transceiver with Fault Tolerant Design for Hot Pluggable Applications 未知

公开(公告)号：CA2178846A1

公开(公告)日：1993-04-29

申请号：CA2178846

申请日：1992-07-03

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J , DACOSTA DONALD J , DIEPENBROCK JOSEPH C , EPLEY PHILLIP R

IPC: H04B1/40

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