公开(公告)号：BR9203871A

公开(公告)日：1993-05-04

申请号：BR9203871

申请日：1992-10-05

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J ,  DACOSTA DONALD J ,  DIEPENBROCK JOSEPH C ,  EPLEY PHILLIP R

IPC: H04L25/02 ,  G06F13/40 ,  H03K19/0175 ,  H04L25/08

公开(公告)号：DE3382600T2

公开(公告)日：1993-03-11

申请号：DE3382600

申请日：1983-11-23

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J ,  WALKER ROBERT F

IPC: G09G5/00 ,  G06F3/033 ,  G06F3/048 ,  G06F3/14 ,  G09G5/02 ,  G09G5/36 ,  G06F3/037

Abstract: An apparatus for carrying out, at frame rates, entity detection and verification on bit-mapped raster graphic systems by providing an entity identification bit sequence with each feature of the picture displayed. The apparatus includes a display (13) coupled to a store (10) for input data, serially sending items of data to the display, together with means (24-27) for identifying the items of data so supplied, such that any item of data forming a selected feature, i.e., line, circle, background or the like of the display can be identified (29), and stored (20). Comparison (22) and register (20) means are used to drive a modulating means (18) to verify the display of the items of data, forming the selected feature, when a correlation (22) occurs between the selected feature (20) and the feature formed by the items of data sent (17,21) from the store. Verification (18) may be emphasizing, i.e., brightening, flashing, color change, etc. of the feature selected.

公开(公告)号：CA2178846C

公开(公告)日：1998-11-17

申请号：CA2178846

申请日：1992-07-03

Applicant: IBM

Inventor： EPLEY PHILLIP R ,  DACOSTA DONALD J ,  DIEPENBROCK JOSEPH C ,  CHRISTOPHER ROBERT J

IPC: H04B1/40

Abstract: A high-speed data transport system for use in computers, switches, microprocessors or the like includes a low impedance differential bus and a plurality of transceivers connected to the bus. Each of the transceivers is provided with a driver circuit which places data onto the bus and a receiver for accepting data from the bus. The driver includes a pseudo-differential current driving circuit arrangement which sinks current from only one side of the bus while the other side of the differential bus is undisturbed. The receiver includes a differential comparator biased to a preferred output voltage level.

公开(公告)号：CA2073105A1

公开(公告)日：1993-04-29

申请号：CA2073105

申请日：1992-07-03

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J ,  DACOSTA DONALD J ,  DIEPENBROCK JOSEPH C ,  EPLEY PHILLIP R

IPC: H04L25/02 ,  G06F13/40 ,  H03K19/0175 ,  H04L25/08

公开(公告)号：CA2073105C

公开(公告)日：1997-01-21

申请号：CA2073105

申请日：1992-07-03

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J ,  DACOSTA DONALD J ,  DIEPENBROCK JOSEPH C ,  EPLEY PHILLIP R

IPC: H04L25/02 ,  G06F13/40 ,  H03K19/0175 ,  H04L25/08 ,  H03K19/082

Abstract: A high-speed data transport system for use in computers, switches, microprocessors or the like includes a low impedance differential bus and a plurality of transceivers connected to the bus. Each of the transceivers is provided with a driver circuit which places data onto the bus and a receiver for accepting data from the bus. The driver includes a pseudo-differential current driving circuit arrangement which sinks current from only one side of the bus while the other side of the differential bus is undisturbed. The receiver includes a differential comparator biased to a preferred output voltage level.

公开(公告)号：CA2178846A1

公开(公告)日：1993-04-29

申请号：CA2178846

申请日：1992-07-03

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J ,  DACOSTA DONALD J ,  DIEPENBROCK JOSEPH C ,  EPLEY PHILLIP R

IPC: H04B1/40

公开(公告)号：DE3382600D1

公开(公告)日：1992-09-03

申请号：DE3382600

申请日：1983-11-23

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J ,  WALKER ROBERT F

IPC: G09G5/00 ,  G06F3/033 ,  G06F3/048 ,  G06F3/14 ,  G09G5/02 ,  G09G5/36 ,  G06F3/037

Abstract: An apparatus for carrying out, at frame rates, entity detection and verification on bit-mapped raster graphic systems by providing an entity identification bit sequence with each feature of the picture displayed. The apparatus includes a display (13) coupled to a store (10) for input data, serially sending items of data to the display, together with means (24-27) for identifying the items of data so supplied, such that any item of data forming a selected feature, i.e., line, circle, background or the like of the display can be identified (29), and stored (20). Comparison (22) and register (20) means are used to drive a modulating means (18) to verify the display of the items of data, forming the selected feature, when a correlation (22) occurs between the selected feature (20) and the feature formed by the items of data sent (17,21) from the store. Verification (18) may be emphasizing, i.e., brightening, flashing, color change, etc. of the feature selected.

公开(公告)号：CA1209287A

公开(公告)日：1986-08-05

申请号：CA443203

申请日：1983-12-13

Applicant: IBM

Inventor： CHRISTOPHER ROBERT J ,  WALKER ROBERT F

IPC: G09G5/00 ,  G06F3/033 ,  G06F3/048 ,  G06F3/14 ,  G09G5/02 ,  G09G5/36 ,  G09G1/00

Abstract: ENTITY CONTROL FOR RASTER DISPLAYS An apparatus for carrying out, at frame rates, entity detection and verification on bit-mapped raster graphic systems by providing an entity identification bit sequence with each feature of the picture displayed. The apparatus includes a display coupled to a store for input data, serially sending items of data to the display, together with means for identifying the items of data so supplied, such that all the items of data forming a selected feature, i.e., line, circle, background or etc. of the display can be identified, and stored. Comparison and register means are used to drive a modulating means to verify the display of the items of data, forming the selected feature, when a correlation occurs between the selected feature and the feature formed by the items of data sent from the store. Verification may be emphasizing, i.e., brightening, flashing, color change, etc. the feature selected.