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    MEMORY DEVICE
    3.
    发明专利
    MEMORY DEVICE 未知

    公开(公告)号：DE3278591D1

    公开(公告)日：1988-07-07

    申请号：DE3278591

    申请日：1982-06-29

    Applicant: IBM

    Inventor： DIMARIA DONELLI JOSEPH

    IPC: G11C14/00 ,  H01L21/8247 ,  H01L27/10 ,  H01L27/105 ,  H01L29/788 ,  H01L29/792 ,  G11C11/00

    Abstract: A volatile part of the memory device comprises an FET (38) with a source contact (37), and a drain region (34) forming a storage capacitor (30) with a plate (32) of contact (35), the FET having a control gate (12). A non-volatile part comprises a floating gate (14) of the FET which gate is coupled to the region (28) via a dual electron injector structure (18) and region (26). Charge on the floating gate can be adjusted via the gate (12) and contact (37).

    MEMORY CELL
    5.
    发明专利
    MEMORY CELL 未知

    公开(公告)号：DE3279630D1

    公开(公告)日：1989-05-24

    申请号：DE3279630

    申请日：1982-06-29

    Applicant: IBM

    Inventor： CHAO HU HERBERT ,  DIMARIA DONELLI JOSEPH

    IPC: H01L27/112 ,  G11C14/00 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/10 ,  H01L29/788 ,  H01L29/792 ,  G11C11/00

    Abstract: A non-volatile dynamic semiconductor memory cell comprises a one device dynamic volatile memory circuit associated with bit line (BL) and having a switching device (FET 14) and a storage capacitor (Cs); and a non-volatile floating gate device disposed between the storage node (10) and the switching device. The non-volatile floating gate device has a floating gate (FG), a floating gate FET (3), a control gate (P) and a voltage divider (16) having first and second serially-connected capacitors (C1, C2), with the floating gate being disposed at the common point between the first and second capacitors. One of the capacitors (C1) includes a dual charge or electron injector structure and the capacitance of this capacitor has a value substantially less than that of the other capacitor (C2).

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