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    2.
    发明专利
    未知

    公开(公告)号：DE962344C

    公开(公告)日：1957-04-18

    申请号：DEI0008693

    申请日：1954-05-26

    Applicant: IBM DEUTSCHLAND

    Inventor： YOUNG DONALD REEDER ,  JUN RALPH BENJAMIN DELANO

    IPC: G11C11/23 ,  H01J31/58

    Abstract: 762,314. Electric digital-data-storage apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 21, 1954 [May 26, 1953], No. 14984/54. Class 106 (1). In a method of or system for writing or storing information in a cathode-ray tube having a beam control grid, dielectric target and capacitatively. coupled backing-plate, the beam is turned on, a voltage pulse is applied to the backing-plate, and the beam is turned off before or after the backing-plate pulse is terminated to represent first and second information states respectively. In the storage tube shown in Fig. 2, binary digits are represented by charges on elemental areas of a dielectric target 3 capacitatively coupled to a backing-plate 6. The cathode beam, controlled by grid 4 and focused by electron gun 2, is caused to scan the areas by applying sawtooth or other voltages to deflection plates 5. As the beam bombards a target area, secondary electrons are emitted and attracted to a collector grid 7, such electrons being prevented from raining back on adjacent target areas by a barrier grid 8. The target assembly and associated grids may be constructed as described in Specification 762,294, [Group XL (a)]. The operations of the storage system shown, during writing, regeneration and reading, are described separately below. The operating cycle, Fig. 1, for each binary digit comprises 8 Ás. intervals of which the first three comprise a beam deflection period and the second three a period during which the beam may be disected on to the target. The electronic operation-control circuits, for which diagrams are given, include diode coincidence gates, pentode inverting gates, pentode and triode inverters and triode cathode followers. Writing.-During the 4th Ás. interval, a positive " beam on " pulse on lead 9, Figs. 1 and 2, applied through diode 10, charges condenser C12. The resultant positive potential on lead 11 is applied through cathode follower 13 to parallel diode coincidence gates A-D associated with different storage tubes. The tube shown is selected by applying a positive pulse over lead 17 to gate A which thus produces a positive output applied through inverters 19 and 21 and clipping circuit 23 to the control grid 4, thus switching on the beam. At the beginning of the 5th Ás. interval, a sharp positive pulse on lead 25 triggers a blocking oscillator 28 through circuit 26. The oscillator output pulse of just over 1 Ás. duration is applied through cathode followers 30, 32 and inverter 34 to bias negatively the backing-plate 6 (see bottom of Fig. 1). If a " 1 " is to be written a positive pulse is applied at 5 Ás. time from 42 to a gate and inverter 45 which is opened, through inverter 44, by a negative potential on line 43. The negative output from 45 passes through diode 46 and discharges condenser C12, thus switching off the beam while the backing-plate is negative and producing a positive charge on the target area being scanned. In the absence of the " one write " pulse on 42, the beam is switched off at 6 Ás. time, after the negative potential has been removed from the backing plate, by a " dash clamp " pulse on lead 40 which passes through diode 41, and no charge or " zero " is stored. Regeneration. The beam is switched on at the beginning of the 4th Ás. interval as for writing. A " 1 " or positive charge stored on the selected target area is neutralized, the number of primary electrons received being greater than the number of secondary electrons emitted, and a negative pulse is obtained from the backing-plate 6 and applied over lead 35 to amplifier 50 which produces an amplified and inverted pulse on lead 51. The amplifier (Fig. 5, not shown) comprises four cathode-coupled grounded-grid double triode stages followed by a pentode output stage and is designed to have a high recovery time from the backing plate pulse applied from inverter 34, the magnitude of pulses applied to the amplifier being limited by a bank of diodes 37 (only one shown); the amplifier also includes high-frequency filters to cut out spurious signals. The positive pulse on lead 51 allows a sharp " sample I " pulse to pass through gate and inverter 52 to inverter 55 and diode 57, thus charging condenser C58. The resultant positivepotential on lead 59 allows a " sample II " pulse, at the 5th Ás. time to pass through gate and inverter 60 and diode 62, thus discharging condenser C12 and switching off the beam at such a time as to re-write a "1." If, however, a " 0 " was stored on the target area, no signal is obtained from the backing plate and applied to the amplifier, lead 51 is at negative potential to close gate 52, and the beam is switched off at 6 Ás. time by the " dash clamp " pulse as in writing a " 0." Reading.-The output of cathode follower 13 is applied also through cathode follower 15 to output lead 16 so that a 2 or 3 Ás. pulse appears on the latter (see Fig. 1) according to whether a " 1 " or " 0 " is being written or regenerated. For a " 0," the 3 Ás. pulse opens gate and inverter 65 to allow a read clock pulse on lead 66, occurring during the 6th Ás. interval, to produce a negative output pulse on lead 67.

    6.
    发明专利
    未知

    公开(公告)号：DE1030067B

    公开(公告)日：1958-05-14

    申请号：DEI0009627

    申请日：1955-01-05

    Applicant: IBM DEUTSCHLAND

    Inventor： WILSON EDWARD SILVERS ,  YOUNG DONALD REEDER

    IPC: G11C11/22

    Abstract: 766,501. Electric digital-data-storage apparatus; statistical apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Jan. 4, 1955 [Jan. 6, 1954], No. 192/55. Class 106 (1). [Also in Groups XXXIX and XL (b)] In a digital-data-storage apparatus, switching means connect a charging source to selected ones of a set of ferro-electric cells to store data therein, and for reading out, pulses are applied to all of the cells, and the consequential output pulses are passed to a common terminal. As shown, a disc 60, driven synchronously with a feed roller 43 for punched record cards, carries in each quadrant twelve ferro-electric cells 10 corresponding to the twelve record positions in a column of a punched card. The cells are connected to a negative potential for reading-cut and re-setting purposes as described below and, for writing-in, each cell may be connected to a positive source 21 by means of a photo-conductive element 20. The latter elements are all connected to the source 21 through a slip-ring 23. A lamp, e.g. 41a, is associated with each quadrant and is arranged to shine in turn on the elements 20 of its quadrant so as effectively to connect the cells to the source 21, the lamp being energized intermittently under the control of a brush, e.g. 42a, sensing the corresponding column of the punched card as it is advanced by the roller 43. For reading-out, a second photoconductive element 30 is associated with each cell 10 and all of the elements 30 are illuminated in turn by a single lamp 51 energized intermittently by contacts 52 operated synchronously with the disc 60. Thus, and by means of a slip-ring 33, the cells are effectively connected in sequence to a negative re-setting source 31. The output pulses from the cells are passed by a slip-ring 13 to a common output circuit 15. Reading-out may be achieved by applying pulses of the same polarity as those used for writing-in, e.g. by means of the lamps 41 and elements 20, but, in this case, the cells must be reset, e.g. by the lamp 51 and elements 30. Alternatively, a single source, connected by means of a single set of elements, e.g. 20, may be used for both writing-in and reading- out, the polarity being reversed by switching means in one case. The elements and cells or elements alone may be mounted on the periphery of a drum and in this case the arrangement may be repeated axially along the drum. Printed circuit techniques may be used. The photo-conductive elements may be replaced by commutator arrangements. In a different embodiment, the cells and photo-conductive elements may be arranged in a flat rectangular panel in accordance with the record positions of a punched card, writing-in being effected by direct super-position, and reading-out by causing a beam of light to traverse the storage units sequentially. Specification 717,104 is referred to.

    7.
    发明专利
    未知

    公开(公告)号：DE3580417D1

    公开(公告)日：1990-12-13

    申请号：DE3580417

    申请日：1985-06-24

    Applicant: IBM

    Inventor： WEINBERG ZEEV AVRAHAM ,  YOUNG DONALD REEDER

    IPC: H01L21/316 ,  H01L21/268 ,  H01L21/28 ,  H01L29/51

    Abstract: Silicon dioxide insulating films for integrated circuits are provided with enhanced electronic properties, including enhanced dielectric break-down of MOS insulating layers and reduced trapping of holes by exposing a metal oxide semiconductor wafer including an exposed silicon dioxide layer, in an ambient of flowing oxygen gas, to heating radiation from a halogen lamp for a duration on the order of 100 seconds to achieve annealing temperature on the order of 1000C.For reduced hole trapping, the ambient gas is oxygen and the annealing temperature is on the order of 1000C for a duration on the order of 100 seconds, depending on the oxide thickness.Nitrogen, occurring at the silicon-silicon dioxide interface as a result of previous processing including a long anneal in nitrogen, increases the improvement of the silicon dioxide by the subsequent rapid thermal annealing in oxygen.

    9.
    发明专利
    未知

    公开(公告)号：DE1201871B

    公开(公告)日：1965-09-30

    申请号：DEJ0025011

    申请日：1963-12-23

    Applicant: IBM

    Inventor： YOUNG DONALD REEDER

    IPC: G11C11/44

    10.
    发明专利
    未知

    公开(公告)号：DE1077702B

    公开(公告)日：1960-03-17

    申请号：DEI0012696

    申请日：1957-01-15

    Applicant: IBM DEUTSCHLAND

    Inventor： DROUGARD MAURICE EMILIE ,  HUIBREGTSE EDWARD JUNIOR ,  YOUNG DONALD REEDER

    IPC: G11C11/22

    Abstract: 849,827. Circuits of multi-stable dielectric elements. INTERNATIONAL BUSINESS MACHINES CORPORATION. Jan.15, 1957 [Jan. 17, 1956], No. 1464/57. Class 40 (9). [Also in Group XXXVI] A bi-stable circuit element comprises a crystal of material capable of existing in a first and second crystalline state at a particular temperature and in which transition between said first and said second crystalline state can occur in response to changes of electric field intensity, and means for maintaining the temperature of said crystal substantially constant at said particular temperature. According to the Specification barium titanate can exist in three different crystalline forms depending upon its temperature, the crystals being orthohombic below about 5‹ C., tetragonic between this temperature and about 120‹ C. (the Curie temperature) and cubic above the Curie temperature, and whereas at room temperature barium titanate exhibits the familiar rectangular hysteresis loop, Fig. 1, near the lower structural transition temperature three loops, Fig. 13, (4‹ C.) occur and near the upper structural transition temperature two loops, Fig. 4b (121 ‹ C.) occur. Of these hystereses loops those occurring in the 1st and 3rd quadrants are accompanied by a change of crystal structure. Thus at 121‹ C., Fig. 4b, at which temperature barium titanate has a cubic crystal structure, as a steadily increasing electric field is applied to it the polarisation increases steadily until point h is reached, when it rises rapidly to point k, the rise being accompanied by a rapid change in structure of the barium titanate from cubic to tetragonic. As the electric field is steadily decreased, the polarization steadily decreases to point e where it changes rapidly as the barium titanate returns from the tetragonic form to the cubic form. A similar cycle occurs at 4‹ C., Fig. 13, the rapid rise in polarisation at point h being accompanied by a change of structure from orthohombic to tetragonic and the rapid decrease at point e being accompanied by a change of structure from tetragonic to orthohombic. According to the Specification as an excursion around any one of these loops involves changes in crystal structure, the variations in the electric field required to produce such an excursion are precisely defined, and therefore, continues the Specification, by applying a suitable biasing voltage Eb, to the barium titanate bi-stable operation can be achieved without the defects of " hysteresis loop-decay " (or fatigue) and " hysteresis walking " both of which are present in the known devices employing the centrally disposed hysteresis loop. A further advantage also accrues from the use of these loops in that since the slopes of the upper and lower portions of the loops differ appreciably the effective capacitance of a barium titanate capacitor when in state c, is different from that, when in state d, and thus a non-destructive read out can be obtained by varying the applied voltage within the range Ep to Ef, Fig. 4b, or Eo to Et, Fig. 13. A circuit Fig. 10 employing a barium titanate capacitor 50, maintained at 121‹ C. by a thermostatically controlled oven 70 is described, which can function either as a single-bit digital data store having non-destructive read out or as an and gate, or as a trigger circuit. The barium titanate capacitor 50 has a steady biasing voltage Eb, Fig. 4b, applied to it by a battery 72, and can be set in state d, Fig. 4b, by depressing a key 75 or in state c by depressing a key 80. A continuous indication of the state of the barium titanate capacitor is available at a terminal 113 for the duration of the period for which a key 102 is depressed, depression of this key applying inductively a high frequency voltage to a coil 100 arranged to resonate with the capacitor when in its d state (the voltage being less in amplitude than Ec, Fig. 4b), and the voltage developed across the condenser as a result of this being amplified, rectified and smoothed, and passed to terminal 113. When the circuit is used as a trigger circuit the key 102 is maintained depressed. The trigger is then turned on by depressing key 75 and turned off by depressing key 80.

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