公开(公告)号：US3400309A

公开(公告)日：1968-09-03

申请号：US49733265

申请日：1965-10-18

Applicant: IBM

Inventor： DOO VEN Y

IPC: H01L21/00 ,  H01L21/314 ,  H01L21/762 ,  H01L23/29

CPC classification number: H01L21/00 ,  H01L21/314 ,  H01L21/76297 ,  H01L23/29 ,  H01L2924/0002 ,  Y10S148/043 ,  Y10S148/05 ,  Y10S148/085 ,  Y10S148/148 ,  H01L2924/00

公开(公告)号：US3701659A

公开(公告)日：1972-10-31

申请号：US3701659D

申请日：1970-06-01

Applicant: IBM

Inventor： DOO VEN Y ,  REGH JOSEPH ,  SETO DAVID K

IPC: G03F1/54 ,  G03C5/00

CPC classification number: G03F1/54

Abstract: A PHOTOLITHOGRAPHIC MASK COMPRISING A SUBSTRATE OF QUARTZ OR GLASS AND A PATTERN-DEFINING LAYER OF A SEMICONDUCTOR MATERIAL SUCH AS SILICON. THE PATTERN IS DEFINED IN THE SEMICONDUCTOR MATERIAL BY ETCHING OF THE SEMICONDUCTOR, INVOLVING DISPLACEMENT OF THE SEMICONDUCTOR IN SELECTED AREAS WITH A METAL SUCH AS COPPER. IN THIS WAY, A HIGH RESOLUTION MASK IS OBTAINABLE HAVING THE ADDED FEATURE OF BEING PARTIALLY TRANSPARENT.

公开(公告)号：US3518503A

公开(公告)日：1970-06-30

申请号：US3518503D

申请日：1967-06-07

Applicant: IBM

Inventor： DOO VEN Y

IPC: C30B13/00 ,  C30B19/00 ,  H01L21/00 ,  H01L21/18 ,  H01L27/00 ,  H01L31/0368 ,  H01L31/0392 ,  H01L7/36 ,  H01L5/00

CPC classification number: H01L31/03921 ,  C30B13/00 ,  C30B19/00 ,  C30B29/60 ,  H01L21/00 ,  H01L21/185 ,  H01L27/00 ,  H01L31/03682 ,  Y02E10/546 ,  Y10S148/051 ,  Y10S148/071 ,  Y10S148/107 ,  Y10S148/122 ,  Y10S148/15 ,  Y10S148/152

Abstract: A polycrystalline film formed on a polycrystalline refractory substrate by vapour deposition is recrystallized (see Division B1) to form a plurality of large single crystals separated by grain boundaries. Further silicon may then be deposited to build up the monocrystalline structure. The substrate may be of alumina, graphite, magnesia, silicon carbide, zinc oxide, or titania. P-type doping may be effected during vapour deposition, after which an N-type dopant may be diffused into the upper surface of the layer to produce a P-N junction.ALSO:A silicon film comprising a plurality of large single crystals separated by grain boundaries is formed on a polycrystalline refractory substrate by depositing a polycrystalline silicon film from vapour on the substrate, heating the film over at least a portion of its area to a temperature 5-30 DEG C. above its mp (which is insuffient to form globules), and cooling the molten film 20-100 DEG C. to a temperature below its mp in 10-15 sec. After solidification, cooling to ambient temperature may be effected in 15-20 min. Heating may be effected progressively from one edge towards the opposite edge which may be left unmelted and from which the cooling may be commenced. The single crystal may have a length of 3,000 m , a width of 500 m , and a thickness of 10-20 m . The substrate may be of alumina, graphite, magnesia, silicon carbide, zinc oxide, or titania. Doping with boron or phosphorus may be effected during vapour deposition.

公开(公告)号：US3600241A

公开(公告)日：1971-08-17

申请号：US3600241D

申请日：1968-09-09

Applicant: IBM

Inventor： DOO VEN Y ,  SPIRO ANDREA

IPC: H01L21/00 ,  H01L21/322 ,  H01L21/74 ,  H01L23/29 ,  H01L23/544 ,  H01L7/00 ,  C23C11/00 ,  H01L7/36

CPC classification number: H01L23/544 ,  H01L21/00 ,  H01L21/3221 ,  H01L21/74 ,  H01L23/291 ,  H01L2924/0002 ,  Y10S148/007 ,  Y10S148/017 ,  Y10S148/037 ,  Y10S148/04 ,  Y10S148/041 ,  Y10S148/043 ,  Y10S148/085 ,  H01L2924/00

Abstract: IN SEMICONDUCTOR DEVICE FABRICATION, AFTER DIFFUSION HAS BEEN CARRIED OUT AT ELEVATED TEMPERATURES THROUGH A SIO2 OR OTHER DIFFUSION BARRIER MASKS, THE MASK IS STRIPPED FROM THE SURFACE OF THE SEMICONDUCTOR SUBSTRATE, AND THE SURFACE OF THE SEMICONDUCTOR SUBSTRATE IS REOXIDIZED. THIS ELIMINATES SURFACE DEFECTS IN THE SEMICONDUCTOR SUBSTRATE WHICH TEND TO ARISE AT THE ELEVATED TEMPERATURES OVER RELATIVELY LONG PERIODS OF TIME NECASSRY FOR DIFFUSION. WHERE AN EPITAXIAL LAYER IS TO BE FORMED ON THE SURFACE OF THE SUBSTRATE, THE OXIDE LAYER IS FIRST REMOVED FROM THE SURFACE. THIS REDUCES STACKING FAULTS IN THE SUBSTRATE.

公开(公告)号：US3335038A

公开(公告)日：1967-08-08

申请号：US35560064

申请日：1964-03-30

Applicant: IBM

Inventor： DOO VEN Y

IPC: C30B13/00 ,  C30B19/00 ,  H01L21/00 ,  H01L21/18 ,  H01L27/00 ,  H01L31/0368 ,  H01L31/0392

CPC classification number: H01L31/03921 ,  C30B13/00 ,  C30B19/00 ,  C30B29/60 ,  H01L21/00 ,  H01L21/185 ,  H01L27/00 ,  H01L31/03682 ,  Y02E10/546 ,  Y10S148/051 ,  Y10S148/071 ,  Y10S148/107 ,  Y10S148/122 ,  Y10S148/15 ,  Y10S148/152

Abstract: A polycrystalline film formed on a polycrystalline refractory substrate by vapour deposition is recrystallized (see Division B1) to form a plurality of large single crystals separated by grain boundaries. Further silicon may then be deposited to build up the monocrystalline structure. The substrate may be of alumina, graphite, magnesia, silicon carbide, zinc oxide, or titania. P-type doping may be effected during vapour deposition, after which an N-type dopant may be diffused into the upper surface of the layer to produce a P-N junction.ALSO:A silicon film comprising a plurality of large single crystals separated by grain boundaries is formed on a polycrystalline refractory substrate by depositing a polycrystalline silicon film from vapour on the substrate, heating the film over at least a portion of its area to a temperature 5-30 DEG C. above its mp (which is insuffient to form globules), and cooling the molten film 20-100 DEG C. to a temperature below its mp in 10-15 sec. After solidification, cooling to ambient temperature may be effected in 15-20 min. Heating may be effected progressively from one edge towards the opposite edge which may be left unmelted and from which the cooling may be commenced. The single crystal may have a length of 3,000 m , a width of 500 m , and a thickness of 10-20 m . The substrate may be of alumina, graphite, magnesia, silicon carbide, zinc oxide, or titania. Doping with boron or phosphorus may be effected during vapour deposition.

公开(公告)号：US3558374A

公开(公告)日：1971-01-26

申请号：US3558374D

申请日：1968-01-15

Applicant: IBM

Inventor： BOSS DAVID W ,  DOO VEN Y ,  PATTERSON WILLIAM N

IPC: C23C16/44 ,  C23C16/00 ,  C30B25/02 ,  C30B29/06 ,  C30B31/06 ,  H01L21/00 ,  H01L21/205 ,  H01L21/22 ,  H01L21/331 ,  H01L21/763 ,  H01L21/86 ,  H01L27/00 ,  H01L29/04 ,  H01L29/73 ,  H01L29/78 ,  H01L7/36

CPC classification number: H01L29/04 ,  C23C16/00 ,  H01L21/00 ,  H01L27/00 ,  Y10S148/085 ,  Y10S148/122 ,  Y10S148/15

Abstract: A FILM OF A POLYCRYSTALLINE MATERIAL IS DEPOSITED PYROLYTICALLY ON AN ELECTRICALLY INSULATING SURFACE OF A SUBSTRATE. BY CONTROLLING THE RATE OF DEPOSITION OF THE MATERIAL ON THE SUBSTRATE AND THE TEMPERATURE OF THE SUBSTRATE, THE GRAIN SIZE OF THE POLYCRYSTALLINE FILM IS REGULATED SO THAT PN JUNCTIONS HAVING A SHARP REVERSE BIASED BREAKDOWN MAY BE FORMED THEREIN.

公开(公告)号：US3386865A

公开(公告)日：1968-06-04

申请号：US45437465

申请日：1965-05-10

Applicant: IBM

Inventor： DOO VEN Y

IPC: H01L21/316 ,  H01L21/74 ,  H01L21/762

CPC classification number: H01L21/02238 ,  H01L21/02255 ,  H01L21/31662 ,  H01L21/74 ,  H01L21/76294 ,  Y10S148/037 ,  Y10S148/043 ,  Y10S148/049 ,  Y10S148/085 ,  Y10S148/117

公开(公告)号：FR2357072A1

公开(公告)日：1978-01-27

申请号：FR7716801

申请日：1977-05-26

Applicant: IBM

Inventor： DOO VEN Y ,  FANG FRANK F

IPC: H05K3/46 ,  H01L21/98 ,  H01L23/02 ,  H01L23/04 ,  H01L23/538 ,  H01L25/065 ,  H02G3/16 ,  H01L21/92 ,  H01L23/50

Abstract: The assembly is formed by a signal substrate layer and a reference substrate layer. The signal layer carries integrated circuits, and the reference layer lies opposite the former, with spacers between them forming an air gap between adjacent layer surfaces. The substrate (19) carrying the signal layer has on each side a pattern of conducting traves (23-25), and conductors passing through the substrate. These conductors make at specified points a connection between the two conducting patterns (23-25), or with the reference layer. The substrate (20) carrying the reference layer is coated on both sides with a conducting film (26, 27) and also has conductors passing through it, which are either connected with the conducting films, or insulated from them. The spacers (21, 22) are produced on the signal layer and/or the reference layer.

公开(公告)号：CA1090002A

公开(公告)日：1980-11-18

申请号：CA305588

申请日：1978-06-15

Applicant: IBM

Inventor： DOO VEN Y

IPC: H05K1/16 ,  H01L23/02 ,  H01L23/12 ,  H01L23/52 ,  H01L23/64 ,  H01L25/00 ,  H05K1/18 ,  H05K1/04

Abstract: HIGH PERFORMANCE INTEGRATED CIRCUIT SEMICONDUCTOR PACKAGE AND METHOD OF MAKING A high performance package for integrated circuit semiconductor devices in which decoupling capacitors are provided in close proximity to the integrated circuit devices for reducing voltage variations in the power driver lines, and/ or a ground plate overlying the stripe metallurgy on the surface of the substrate for reducing cross-talk between signal lines. The decoupling capacitors are each comprised of a conductive layer on the inside of a via hole, a concentric dielectric layer on the conductive layer, and an electrically conductive plug in physical contact with the dielectric layer that is associated with the driver line circuitry of the package.

公开(公告)号：CA1073557A

公开(公告)日：1980-03-11

申请号：CA279129

申请日：1977-05-25

Applicant: IBM

Inventor： DOO VEN Y ,  FANG FRANK F

IPC: H05K3/46 ,  H01L21/98 ,  H01L23/02 ,  H01L23/04 ,  H01L23/538 ,  H01L25/065 ,  H02G3/16 ,  H05K7/20

Abstract: A MULTILAYER INTERCONNECT SYSTEM, AND METHOD OF MAKING A large scale integrated circuit multilayer interconnect system in which signal propagation delay is substantially reduced by using air as the dielectric between layers, rather than an insulating material. The system is comprised of a plurality of two basic layers, namely a signal plane layer and a reference plane layer. The basic layers are spaced from and alternated with one another by insulated spacers to maintain a desired air gap.